TSMC and UMC Intro Different 65 nm DFM Solutions

TSMC has unveiled a 65 nm design for manufacturing (DFM) compliance design support ecosystem that is driven by a manufacturing-based unified data format to channel DFM capabilities through selected EDA tools directly to the designers' workstations. It was developed to align DFM tools, such as lithography process check, CMP analysis and critical area analysis, to TSMC's manufacturing data format. It allows designers to use the same DFM data file irrespective of tool or vendor. "This is a comprehensive collaboration to deliver 65 nm DFM-compliant products and design services to the designer's desktop," said Edward Wan, senior director of design services marketing for TSMC, in a statement.

At the same time, UMC reported that its 65 nm production is ramping and providing optimized DFM resources for each customer instead of a generic DFM solution. This is a different approach from TSMC's ecosystem, which Patrick Lin, UMC's chief system-on-a-chip (SoC) architect for system architecture and support, said is not efficient because it doesn't account for individual optimization needs for each customer.

With TSMC's approach, designers can download an encrypted DFM data kit, compiled in the DUP format, and run TSMC-qualified DFM tools directly on their workstations, with results that are consistent with the company's internal DFM results. The ecosystem results from a year-long collaboration between TSMC and its design partners to shorten the 65 nm design cycle and accelerate time-to-market and time-to-volume. EDA companies involved in the qualification of the support ecosystem include: Anchor Semiconductor, Cadence Design Systems, Clear Shape Technologies, Magma Design Automation, Mentor Graphics, Ponte Solutions, Predictions Software, and Synopsys. In total, TSMC's DFM-compliance initiative encompasses 18 companies from the IP, library, EDA and design center communities including: Alchip, Anchor, Aprio, AnalogBits, ARM, Blaze DFM, Cadence, Clear Shape, Dolphin Technology, Fastrack, Global Unichip, Magma, Mentor, Ponte, Predictions, Qthink, Synopsys, and Virage Logic.

UMC's DFM solution includes lithography process check, critical area analysis, litho and chemical mechanical polishing (CMP), variation-aware extraction, thermal impact analysis, and static statistical timing analysis. To develop its DFM offering, UMC said it partnered with every major EDA vendor as well as newer DFM companies. In addition to this customized approach, UMC's DFM solution includes DFM-compliant IP that embraces the intricacies of the fabrication process. The foundry will also perform post-tapeout services for each customer, including optical proximity correction (OPC), lithography rule check (LRC), dummy metal fill, and slotting.

Xilinx and Texas Instruments have qualified field-programmable gate array (FPGA) and cell phone baseband designs on UMC's process and are in production for various 65 nm products at the foundry, with eight other customers engaged and 11 product tapeouts expected by the end of the summer, the company stated.

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