Linewidth Standard to Calibrate AFMs, SEMs and OCD Tools

The semiconductor fabrication engineer who is responsible for metrology perennially struggles to determine whether his tool — be it an atomic force microscope (AFM), SEM or anything else — is properly calibrated. This requires a highly dependable, traceable linewidth standard, which is something that is not always easily available.

A group led by Michael Cresswell of the semiconductor electronics division of NIST (Gaithersburg, Md.), in conjunction with other staff from that organization's electronics and electrical engineering, information technology, and manufacturing engineering laboratories, has developed a new generation of prototype single-crystal CD reference materials in partnership with Sematech. Each of these reference resources is configured as a 10 × 11 mm silicon test chip mounted in a 200 mm carrier wafer. At the suggestion of — and with the assistance from — Sandia National Labs (Albuquerque, N.M.), the group used MEMS techniques, applying the lattice plane selective type of etching common to that technology for fabricating both the chips, which have a selection of reference material features in the form of isolated lines, as well as the carrier wafer itself.

Current work is based on results obtained in 2004 when they delivered samples with a minimum of 70 ±14 nm lines. Through chemistry improvements and closer control, a second distribution had calibrated linewidths as narrow as 40 ±2 nm. In 2005, a summary report was presented at SPIE Microlithography , and the group was funded by NIST to do a further iteration. This time, the goal was to produce <40 nm linewidths while bringing uncertainty down to 1 nm. This is expected to be accomplished through extended studies of the reference feature etching chemistry. The work is extremely exacting, because producing a linewidth standard that is sufficiently narrow to be relevant to state-of-the-art applications makes it necessary to fabricate features that have very well defined linewidths. For the standard to be useful, there cannot be excessive line edge roughness, because then the concept of "linewidth" tends to lose its meaning. Sidewalls must be sufficiently flat to make it clear to which cross-section dimension of the reference feature the specified linewidth applies, and where along the entire length of the reference feature the specified dimension is located.

This is a high-resolution TEM image of a narrow silicon feature. Its width was determined to be 45.67 nm with a 0.59 nm expanded uncertainty by counting the silicon’s lattice planes. The feature’s top surface is a (110) plane, and its sidewalls are separated by parallel (111) planes. The (111) plane spacing is 0.313 560 137 nm with a standard uncertainty of ±0.000 000 009 nm. The (111) planes are imaged as lines instead of individual atoms to simplify counting the lattice. This is accomplished by rotating the sample slightly along the axis of the (111) planes. If this rotation is along the correct axis exactly, the images of the atoms are “smeared” into lines. (Source: NIST)

A major challenge that still remains for the researchers is the preference of would-be users not to have the chip/carrier-wafer format used in the earlier deliveries. Engineers have made clear their preference to have the reference features patterned monolithically into whole wafers. In spite of the fact that suitable 200 mm starting material is difficult to obtain in the special orientation that is needed to produce the requisite vertical sidewalls of the reference features, Sematech has offered the researchers real estate on its latest reticle for patterning 200 mm test wafers with its 193 nm step-and-repeat lithography tool. This is expected to result in narrower linewidths than have been possible in the past.

On the reticle for Sematech's 193 nm tool, there will also be optical CD gratings. These can be used by manufacturers and users of optical CD tools for unique calibration purposes. The gratings will have a much finer pitch, probably 50 nm, a value 5× better than the group previously achieved through the use of other lithography tools.

Although the first distribution of the new standard reference material — planned for within 12 months — will have the chip/carrier-wafer format as well as optical CD gratings on board, only isolated line structures will be calibrated to serve for linewidth reference purposes. Once completed — and after their final calibration — these standards will be available to the industry through NIST's Standard Reference Material Office.

It is not improper to make a pitch to the industry on this page regarding funding. This is one of those instances when the resources we need to progress can be produced only by an organization with the capability to cut across several disciplines and which has the varied specialized skills needed not just to make these standards, but also to characterize and provide them with the necessary traceability. Like most government organizations that actually generate a useful product, NIST is not as amply funded as it ought to be.

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