Nanotech Offers Continuance of Moore's Law
Alexander E. Braun, Senior Editor -- Semiconductor International, 6/15/2006
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Since practically its beginning, Moore's Law has been semiconductor technology's prime mover, with silicon as the vehicle of implementation. As feature sizes continue to shrink and new materials have to be introduced, characterized and domesticated, the industry is looking toward nanotechnology as the means to continue this unparalled technical advancement.
Nanotech's potential is dizzying. Fueled by its unique capability to combine multiple fields ranging from chemistry and biology to quantum mechanics and materials at molecular and atomic levels, it should be able to put to rest for a very long time any concerns about staying abreast of Moore's Law. Of course, first we will have to solve assembly and manufacturing hurdles, and the R&D effort and expenditures this will require promise to be far from minor.
There is a silver lining to these concerns, not the least of which being that, in terms of feature size, the semiconductor industry has been involved with nanotech for well over three decades. For example, e-beam lithography was used in the 1970s to create 60 nm features. What makes it different now is that, although it appears more than likely that silicon will still be with us 20 years from now — possibly up to 20 nm and perhaps beyond — the problems that we will face at the end of that period are beginning to become visible.
But don't sell CMOS short. Much of what we hear about nanotech, as it applies to the semiconductor industry, is the blue-sky stuff that conference papers are made of. When microprocessors and various forms of computers are designed for specific purposes, plain old CMOS (with little change in technology) is used. There is still considerable room for improvement in CMOS technology when it comes to making certain tasks more computationally intensive.
From today's perspective, this is a more technological and cost-effective way of tackling these problems. As Steve Simon, director of theoretical physics research at Bell Labs, puts it, "If you want a single, very fast transistor, some of the III-V technologies are already better. Alternative technologies being considered originate from different platforms, different structures, and different starting points. Even if they were as good as CMOS (none of them are), you're still short a trillion dollars in investments in getting to CMOS's level. There are changes — not necessarily fundamental — to CMOS, which could have substantial effects upon what can be done at a larger scale. Things like optical interconnects on CMOS chips — there's still a lot of blood left in the CMOS stone."
Alhough most everyone looks to carbon nanotubes as the answer to the question of what comes after silicon's demise, there are still too many questions and uncertainties to be conquered and dispelled, not the least of which is how to place them, how to ensure that they grow into the desired structures, and finally whether they will be capable of matching silicon's reliability. It took many generations of engineers and uncountable millions to turn silicon into the familiar workhorse it is now; it is very likely that a similar kind of effort will be necessary with nanotubes.
Broadly speaking, there are presently two approaches to creating nano devices. Rapidly shrinking toward nanoscale is the top-down approach, in which a silicon wafer is etched and various films deposited. The second is the bottom-up approach, the kind most think about when "nanotech" is mentioned. Here, molecules and nanotubes are built to construct devices. Currently, it appears we will have to do both.
According to the International Technology Roadmap for Semiconductors (ITRS), we will use the top-down approach for the next decade. Beyond then, technology leaders like Intel expect to be using silicon nanowires and possibly carbon nanotubes. At that time, we should have a clearer idea of what building blocks will provide the most robust and commercializable technology.
| TechXPOT: Emerging Technologies Tuesday, July 11: Nano Materials & Manufacturing Technologies |
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| 2:40-3 p.m. | Intel, Mike Garner |
| 3-3:20 p.m. | TIS Winner: Cambrios Technologies, Hash Pakbaz |
| 3:20-3:40 p.m. | TIS Winner: Pixelligent Technologies, Kenneth Rygler |
| 3:40-4 p.m. | TIS Winner: NanoDynamics, Karen Buechler |
| 4-4:20 p.m. | Surfx, Robert Hicks |
| 4:20-4:40 p.m. | Nano Green, Suraj Puri |
| Thursday, July 13: Nano Metrology | |
| 2:20-2:40 p.m. | TIS Winner: ALIS Corp., John Notte |
| 2:40-3 p.m. | TIS Winner: Metryx, Liam Cunnane |
| 3-3:20 p.m. | TIS Winner: Ascend Instruments, Joseph Robinson |
nanotechnology.


