Nick Bright, Executive Vice President, Global Products, Lam Research

Nick Bright (Source: Lam Research)

Nick Bright joined Lam Research Corp. (Fremont, Calif.) in May 1998. He is currently executive vice president, responsible for Lam's product businesses and regional operations. He has held various positions within the company, including vice president of technology and engineering, and senior vice president and general manager of Lam products. Prior to joining Lam, Bright was employed by Applied Materials, GEC in the UK, and ABB in Sweden. During his 20 years in the semiconductor equipment industry, he has acquired numerous semiconductor equipment patents. Lam Research was founded in 1980, and is a major supplier of wafer fabrication equipment. It has recently entered the wet clean business area, and maintains facilities throughout the United States, Asia and Europe.

SI: With increasingly complex processes and new materials, all of which have shorter turnarounds and impact tool development, how do you view the CTO's role?

Bright: We're primarily an etch company and, if you reflect on etch, if any processes are changed in the semiconductor flow — like a mask, a thickness or a material — then etch must also change. So we're in a unique position in that, if a semiconductor manufacturer wants to change a device in manufacturing, they either do it by themselves or they get us involved to help. In our universe, there are some 20 major customers, and we're involved with all of them and see all the material changes and how these companies compete with one another. My role is to deal with their roadmaps while trying to make sense of the future; that is, that to make the correct bets for three years out or so, to intercept future requirements.

SI: Since you also deal with your customers' competitors, it must be difficult to get this information.

Bright: There's some of that, but we work it through. Customers will consult us on a problem or something they want. Often, we will partner with that customer to solve their problem. This will affect devices two or three generations out. Ultimately, we must trust each other.

SI: With all these requirements and relationships, what is Lam's R&D roadmap? How do you view R&D?

Bright: There are several dimensions to it. When dealing with existing products, R&D is about how to address device scaling, including the yield enhancements that customers make when they scale and bring in a new line. There are also productivity and control requirement issues, because what some don't realize is that with every technology node, say 65 nm, the total device tolerance is about 10% of that. So you're dealing with atomic-level control; for instance, with 45 nm, you're facing 45 Å, which is about 10-15 atomic layers. And you must keep that within the die, die-to-die, across the wafer, wafer-to-wafer, machine-to-machine, year-to-year. Control is a bigger factor in the etch environment than probably in any of the other technologies, because you're dealing in three dimensions. When you deal with deposition, the problem is just getting a consistent film, and getting it to stick to the layer below, so you have one atomic layer that you must stick to. If you're etching through a stack, you're constantly dealing with three-dimensional space, and the selectivity of one material to the other. So with existing product lines, you are dealing with scaling, yield, productivity, integration and control. With new product lines, you have to deal with where the opportunities will be in the future marketplace, where your company's set of core competencies can be used to address an opportunity that isn't here yet.

SI: With the fast adoption of new architectures and materials by device makers, OEMs face tremendous technology demands — something reflected by the new International Technology Roadmap for Semiconductors (ITRS), which plots a difficult trail for OEMs. How do you cope with the problem of the increasingly costlier R&D that becomes necessary to evolve with the industry and stay in business?

Bright: We don't focus too much on the ITRS, other than using it as a useful general indicator of what specs may be, because it really doesn't reflect what's going to happen. The future is that there remains more to be invented than has already been invented — hence opportunity. The more opportunities there are, the more chances you have to differentiate yourself from competitors. Then you get down to the economics of the business and you see how much you can afford, with whom you can partner in the customer base, and which big problem you should tackle. Putting any new equipment into production costs a fortune these days, so we must be sure that we're solving a real problem — plus the solution delivered must be reliable and cost-effective for three generations. The "If I make it they will buy it" days are long gone.

SI: Industry-wide, is the R&D effort all it ought to be?

Bright: It's a difficult question to answer, because it brings up all sorts of other considerations, such as whether the government should be more involved, whether R&D should be done by everyone together on a pre-competitive basis, and many other questions with which the industry has wrestled with for years. Another consideration that this brings up is what is the industry itself? Is it semiconductor on silicon, nanotechnology or MEMS? Is it a combination of these or all of the above? We're continuously redefining ourselves. Could anyone have predicted a couple of years ago that flash memory would go the way it has? While everything is obvious in hindsight, what's interesting to me is that semiconductor companies' roadmaps have taken over from the ITRS with the passing of time. Companies once developed strategies based on Moore's Law, but now these are diverging in all sorts of interesting ways because shrinks are not necessarily the driver for everybody. All this makes the R&D environment difficult to define. In the final instance, the only source of funds that you can depend on is that which you generate yourself; to do otherwise only slows you down.

SI: So how do you chart Lam's technology course?

Bright: We tend to look for big problems that need solving with process integration, and for those future concerns that our customers talk to us about.

SI: Are you considering things a little further out, such as nanotechnology?

Bright: Not just yet. In the case of carbon nanotubes, for instance, they won't become a production technology unless there is an infrastructure to integrate them, as well as a design infrastructure, etc., around it — plus a very serious need for it. The fact is that today nothing can compete with the cost of making a transistor, and it continually gets cheaper to produce silicon-based transistors. It's very difficult to compete with this — there's a whole food chain composed of device makers, OEMs and the customers who finally use the product. Without it working in sync, nothing can happen. Today, there are about 30 new memory technologies to replace NAND flash, but first cost factors will have to be enabled in some way across the infrastructure before there is realization in manufacturing.

SI: What do you view as some of the industry's major technology obstacles?

Bright: The cost of lithography and masking is easily the biggest issue facing the industry — the roughly $40M that an immersion tool costs is a large investment; that's one of the hurdles. Few companies can afford to keep running down that particular roadmap. Another is that, while the physics of a device operating with >50 nm features is covered by predictable, conventional physics, beyond that design rules and everything else make things very difficult. There's much learning that needs to be done before addressing the problems the new architectures will bring. You'll be wondering about things such as, "Where did my electron go?" The unpredictability of the physics is putting a tremendous burden on the economics, because different assumptions can be made by the design community, and then you may be putting something into manufacturing that won't yield. Manufacturability and yield are becoming major problems.

SI: What about new materials?

Bright: That's also a headache. New materials for use in semiconductors aren't characterized to nearly the level they should be to be capable of replacing SiO₂ and all the materials we've traditionally used. Look at how long copper took, which wasn't even used in the transistor! When you consider things like high-k transistors, you begin to realize the enormous amount of learning that remains to be done. It sometimes seems as if the entire periodic table is being thrown at us; it's going to take a long time to mainstream all these developments, and it's debatable whether the investment streams are there for the decade or so it would take to make many of these a reality.

SI: Do you view power as another problem?

Bright: No question! The transistor's leakage current is one of those obstacles. Switch a transistor off these days and it doesn't. CMOS is scaled, but the problem is that it doesn't. Power consumption, leakage current, all these and more are incompatible with portable devices — everybody's batteries are constantly running down. This must be solved.