David Narum, CTO, FEI Co.
Alexander E. Braun -- Semiconductor International, 3/1/2006
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| David Narum (Source: FEI Co.) |
SI: With the increasingly faster process architecture and materials changes, all of which have a direct impact on tool development, how do you view your role as CTO in today's industry?
Narum: From my perspective, it is somewhat unique, because although the semiconductor industry is a significant part of our business, it is only one of several significant markets we address. Since we're not strictly a semiconductor equipment supplier, my role probably tends to be more multidimensional than that of the typical CTO of a semiconductor equipment supplier. In general, I'm focused on understanding the directions in which our market divisions are trying to move, and the solutions that they see their customers' needs requiring. Connecting those needs and our market strategy to FEI's product roadmaps, and longer term to our core technology roadmaps, requires much of my attention. We have the opportunity to invest in and leverage technologies that can be deployed onto multiple markets, thereby effectively amortizing these investments.
SI: What are your thoughts on the new ITRS?
Narum: For all its flaws, compared to the challenges I face in other markets, the ITRS offers an enormous benefit to us as we attempt to chart the semiconductor waters. It's enormously valuable to equipment suppliers, because it sets the direction that the technology must follow and shines the spotlight on opportunity by identifying gaps on known technologies and equipment. Another huge advantage it brings is the sense of timing — where will the various requirements appear on the timeline. This allows us to invest, at least with some degree of confidence, knowing where we need to be and when, and with a level of assurance that if we get there, then the opportunity will be real.
SI: Nevertheless, your roadmap must be in close sync with your end users.
Narum: Certainly. However, when we talk to individual customers, we sometimes get confusing, or even conflicting, input that we then must reconcile and sort out: What's going to be a unique requirement of one particular manufacturer versus what is emerging as broad-based industry needs. The roadmap is a vehicle for building industry consensus — this is hugely important for an OEM.
SI: What does your roadmap look like?
Narum: We look to leverage trends we've tracked for a number of years. We're starting to see acceleration of these trends at 65 nm and in the advanced development groups beginning to work at 45 nm. We're expecting to see a tidal wave in the trends toward what we would refer to as ultrahigh resolution image-based metrology and root-cause analysis, as well as the shift from a 2-D top-down world to one where the third dimension will be absolutely critical. This is turning from a "would-be-nice-to-have" to a fundamental requirement. We've left the era of just routine dimensional scaling and moved into a time where disruptive technologies — both in terms of devices and materials — are entering the picture. There will be expansion of opportunities around cross-sectional imaging using things like dual-beam technology; meanwhile, resolution requirements for those images are moving beyond what is available with SEM. There clearly will be a need for higher value S/TEM-based imaging. Tool configurations will change and platforms will be interconnected, enabling routine transmission-based (S/TEM vs. SEM) imaging and metrology from in-process. These new tool configurations will become essential to meet the throughput, ease of use, and data management needs of the fab; in the latter, how do you track the data associated with a sample that starts buried on a wafer and ends up in a TEM?
SI: This won't be easy to attain.
Narum: It will require some very astute hardware engineering and R&D. There are serious core technology issues such as material contrast, which is always a problem in many of the structures of interest. For example, an oxynitride structure presents problems in getting sufficient contrast to do the kind of imaging desired, so the development of novel approaches to extract contrast from new material systems is an investigation area.
Another real challenge, which yields a mix of engineering and core technology issues, is the localization problem. In the end image or measurement, not only are you looking for an extremely small structure or feature, but also one needs to locate that feature in 3-D. You are looking in cross-section at a feature that in all three dimensions may be only a few tens of a nanometer or less. Trying to get that sample in position to do the final imaging is difficult to say the least; high-performance, location-specific, damage-free sample preparation is crucial. This spans every technology involved in going from a wafer to an image.
SI: You are enablers for nanotech measurements. What are you currently doing?
Narum: There is a breadth of markets requiring these capabilities. We've restructured the company from being aligned by product lines to being aligned by markets. We now have three market-based divisions or business units: the NanoElectronics, NanoResearch and Institute, and NanoBiology. Emerging opportunities in nanobio are very exciting and relate to structural biology; that is, understanding the structure of proteins and how they interact at the intercellular level. Also in pharmaceuticals, supporting drug development and delivery systems, particularly since many of the delivery techniques will rely on nanostructures. There are great opportunities in development, as well as process control, monitoring and diagnostics.
SI: How do you see the industry's commitment to R&D?
Narum: Certainly in the U.S., the availability of government funding seems to be strongly shifting from electronics and optics — what we traditionally think of as "high-tech" in our space — to an emphasis in funding in the health sciences and the broader nanotechnology area. This leaves pure-play semiconductor equipment suppliers having to go at it on our own in terms of funding advanced development. This is particularly hard for companies like our own when you are attempting to navigate and leverage, and even enable, technology shifts. You really don't know where that money is going to fall within the timeline. This forces you to make some very high-risk bets, and customers aren't as sympathetic as they once were about lending a hand to OEMs doing advanced development.
SI: What do you see as the device maker's biggest challenge over the next three years?
Narum: We've had the big technology shift in backend processing. CMP and the shift to copper are behind us. The radical shifts on the front end to new technologies, materials and device structures — finFETs, trigate structures, high-k for gates — things like that will be problematical. We've inhabited a pure scaling world for years, and lost sight about how difficult those front-end challenges will prove to be. Dealing with the control and monitoring of those very complex and new device structures in the front end will be a very large headache.
SI: Any trends the industry should be paying more attention to?
Narum: We see in some of our customers a reticence to do things differently. We've been battling the inertia of 'Oh, we'll live with CD-SEM, scatterometry, and top-down defect review.' The sense is that these techniques will hang around for a number of years. We don't see this happening, but even some of those doing advance work seem convinced of this. Those doing high-volume manufacturing do not even consider the notion that the world is going to go 3-D on them and SEM imaging will run out of gas.
