Customized Substrates Complement Devices

André-Jacques Auberton-Hervé, President and CEO, The Soitec Group, Bernin, France, www.soitec.com

The watchwords for advanced substrates as we move into the second half of the decade are collaboration and customization.
 
With each new generation, the chipmaker's device architecture and transistor design are becoming even more intimately bound to the starting substrate. There are two important ramifications to this trend. First, the engineered substrate supplier and the chipmaker need to collaborate early in the design process, so that the supplier has time to develop what the chipmaker needs and the chipmaker has time to qualify and tune both design and the substrate specifications. Secondly, the substrate supplier must have the technology to respond proactively in the customization process, and be able to ramp quickly when the chipmaker is ready to move into volume production.
 
The customized substrate, combined with the design and architecture, then becomes an integral part of each chipmaker's device optimization.

Driving the substrate-design trend is the fact that the technological challenges of scaling center on heat dissipation, power, process integration and performance. That puts the focus on materials in general and engineered substrates in particular.

One market driver is the industry's shift in focus from business-oriented markets to mass consumer electronics. While the initial move into this arena is in response to the gamers' thirst for bleeding-edge performance, the chipmakers at the epicenter of this revolution anticipate that within a few years these technologies will generalize to other consumer electronics (especially in what is known as the battle for the digital living room), as well as into other industrial applications. At this point, the emphasis on power consumption becomes even more urgent, and the need for new generations of low power and ultralow power tightens the substrate-design linkage.

In the realm of advanced substrates there will continue to be general families of products — SOI, strained silicon directly on insulator (sSOI), various crystal orientation solutions, and compound solutions, for example. However, within each family, the actual products will be highly customized.

Consider SOI, which is projected to sustain its >40% growth rate through the end of the decade. Initially, there was thin-film SOI for advanced CMOS and thick-film SOI for BiCMOS, optoelectronics and MEMS. Even then, customization was the watchword, with each chipmaker specifying the thickness for the top silicon layer and the insulating BOX.

Moving forward, the customization options are multiplying fast. The top silicon layer and BOX are moving into the realm of the ultrathin to accommodate fully depleted devices and advanced transistor designs.

The advent of strained silicon — especially on insulator — has opened a whole raft of new avenues for those whose focus is mobility enhancement. Chipmakers can specify customized solutions based on global strain, local strain, sSOI, strained silicon on silicon germanium on insulator (SGOI) and hybrid crystal orientation technologies. Germanium on insulator (GeOI) is also in the queue.

Chipmakers looking for RF, low-power or system-on-chip solutions have options including ultrathin film and BOX, high-resistivity handle wafers and, at 45 nm, patterned SOI. At the 32 nm node, solutions for enhanced thermal management will include multilayer BOX and new dielectrics.

Manufacturers of products for optoelectronic and RF markets also have an increasingly wide range of engineered substrate and compound options from which to choose. Gallium nitride on insulator (GaNOI) opens the door to high-performance yet cost-effective blue and white LEDs for lighting.

It also improves performance for RF applications. Other solutions address ultrahigh power. Over the next few years, we'll be introducing innovative solutions that use both Smart Cut and our Picogiga division's molecular beam epitaxy (MBE) expertise. Fine-tuned to each customer's specifications, the combination of layer transfer/bonding with advanced epitaxial growth opens doors to products for both the high and low ends of the market.

Overall, the range of substrate choices is enormous, and the possibilities for customization therein virtually infinite.

With this bounty of materials and customization options, chipmakers need to work closely with the suppliers at least three generations prior to volume production.

In light of the long-term investments in research needed to sustain the momentum, the trend favoring organizations and partnerships that bring together independent research organizations, chipmakers and suppliers of materials and equipment will grow stronger. Organizations such as Leti, IMEC and Sematech, to name a few, as well as national and internationally funded research programs, are excellent vehicles for enabling collaboration and maintaining the pace of innovation through the sharing of resources.

In this decade, as always, the secret is to ride the highs and lows of the business cycles by keeping the focus on innovation, for which substrate engineering provides extraordinary opportunities.