Cryogenic Aerosol for Zero-Damage Cleaning
Jeffrey M. Lauerhaas and Carlos Morote, FSI International, Chaska, Minn.; Jean-Philippe Plé, Altis Semiconductor, Corbeil-Essonnes, France -- Semiconductor International, 12/1/2005
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The cleaning challenges introduced by shrinking device dimensions and new materials have been outlined in several versions of the International Technology Roadmap for Semiconductors (ITRS).1,2 Simply stated, contamination needs to be removed with minimal material loss and no material modification to structures sensitive to damage. This is certainly true for removing potential yield-reducing contamination from unsupported polysilicon gate structures.
In the search for meeting these requirements, many single-wafer cleaning technologies are being investigated to clean sensitive structures without damage; however, simply migrating to a single-wafer platform will not guarantee meeting all these process requirements. Processing limitations, with respect to damage-free cleaning, are becoming apparent, even for single-wafer cleaning. Single-wafer megasonic agitation has shown limited ability to clean features <100 nm in size without damage.3
Also, single-wafer wet processing requires that the wafer be dried after processing, which is non-trivial and a challenge that has not been totally overcome.4 One differentiating single-wafer approach that meets the advanced cleaning requirement is cryogenic aerosol technology. This all-dry process generates solid aerosol clusters that contact the wafer surface and remove particles without damage under the proper processing conditions.
Historically, cryogenic aerosols have been applied at process steps containing robust structures only. Restricting cryogenic aerosols to these applications is a severe underutilization of the technology. Also, cryogenic aerosol development has demonstrated damage-free processing of sensitive polysilicon structures.5,6 We will focus on the front-end-of-line (FEOL) polysilicon gate, pre-spacer deposition clean. Work was performed at Altis Semiconductor to replace the current process of record (POR) wet clean at this process step for the 130 nm node. The strict requirements of no material loss, defect density reduction and damage-free cleaning were the motivation for investigating and implementing the cryogenic aerosol in production. In addition, this article presents data that demonstrates measures taken to extend the process ability of cryogenic aerosols to future device geometries.
Cryogenic aerosol propertiesCryogenics, by definition, involve temperatures below -150°C. We used the Antares CX cryogenic cleaning system with either a mixture of argon and nitrogen or nitrogen alone to generate an aerosol. Both gases freeze below -150°C and therefore satisfy the definition (argon freezes at -189°C and nitrogen freezes at -196°C).
Cryogenic aerosols are inert to the substrate being processed. The solid aerosol clusters contact the substrate surface without surface charging, etching or material loss, and without material modification.6-9 No liquid contacts the substrate, enabling efficient defect reduction independent of the substrate hydrophobicity. This is especially important for low-k materials prone to moisture uptake during wet processing.
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| 1. In the cryogenic process chamber, inert, solid aerosol clusters are delivered through a series of holes in the nozzle and contact the wafer without surface charging or etching. |
The cleaning system utilizes mass flow controllers (MFCs) to precisely control the flows and mixing of the process gases used to form the cryogenic aerosol. After the MFCs, the process gas passes through a liquid-nitrogen-cooled Dewar, resulting in partial condensation of the gas. This liquid/gas mixture is then delivered to the process chamber where the cryogenic aerosol is formed. The liquid exits through a series of holes in a nozzle located above the substrate (Fig 1 ). The process chamber is maintained at a reduced pressure, causing the liquid stream to break up as it exits the nozzle. Accompanying the liquid-stream breakup is evaporative cooling, which results in the formation of the solid aerosol clusters.10,11 The solid aerosol clusters contact the substrate and remove the contamination by momentum transfer. A laminar flow of nitrogen across the substrate carries the contamination and aerosol clusters out of the process chamber. Throughout processing, the substrate is only contacted at the edge within a 2 mm edge exclusion zone.
The cryogenic aerosols generated with the Antares CX system can be separated into two general classes: those generated mainly from argon (ArgonClean process) and the others only from nitrogen (N2 Clean and AspectClean). The main difference between the aerosols is the size distribution of the solid aerosol clusters, which affects the likelihood of damage to sensitive structures. The argon-containing aerosol has a larger average aerosol size than a nitrogen-containing aerosol.5,12 Argon produces a higher-momentum aerosol that is excellent for defect reduction on robust wafer surfaces, but is limited in its ability to clean without damage. The nitrogen-containing aerosols, on the other hand, are still very effective at defect density reduction, but cause less damage to sensitive structures.
The nitrogen aerosol process was developed as an economical alternative to the argon aerosol process. The AspectClean process features enhanced liquid-stream breakup and an evaporative cooling mechanism in the process chamber to deliver a smaller aerosol size, lower-momentum process than the N2 Clean for improved ability to clean without damage.
Damage-free processingWe performed initial work to verify non-damaging performance on 70 nm polysilicon lines with an aspect ratio of ~2.5:1.5 The particle removal efficiency (PRE) was verified with bare silicon wafers contaminated with silicon nitride particles. The particles were deposited using a wet deposition technique, rinsed and dried. Then the wafers were aged for one day to increase the particle adhesion. In this work, we chose a wet particle deposition technique followed by aging, because it is a more difficult particle challenge than a dry deposition technique.
The angle of the aerosol flow direction relative to the substrate, when set to 45°, is optimized for the highest PRE (0° is perpendicular to the wafer surface). Angles <45° are not used because of the disruption of the laminar gas flow across the substrate. All three processes resulted in similar PREs for wet-deposited particles (>99.5%), but had very different damage performances (Fig. 2 ). The ArgonClean process damaged the most, followed by the N2 Clean process and the AspectClean process. However, damage was not eliminated.
By increasing the nozzle angle to 60°, high PRE was maintained while eliminating damage for the AspectClean process. This process, at a nozzle angle of 60°, was investigated at Altis Semiconductor.
Production applicationThe existing SC1 megasonic POR prior to spacer 1 and spacer 2 nitride depositions was limited because of damage, chemical etching and low defect removal efficiency.13 We turned down the megasonic power to reduce damage, but increased the chemical forces (substrate etching and particle undercutting, <1 Å oxide loss) to increase PRE. This approach proved unacceptable because of the increased material loss and lower level of defect removal.
We performed split-lot comparisons to evaluate the performance of the AspectClean process with a 60° nozzle angle vs. a wet SC1-SC2 process sequence. Multiple-lot defect inspection analysis revealed a defect density reduction of 12%, with no damage to the polysilicon gates.
The ability of the new process to reduce the defect density consistently over multiple lots is confirmed by monitoring work in progress over several months (Fig. 3 ). The wet clean, shown for four different tool sets, provided inconsistent results. However, the aerosol process provided consistent performance with one and two process chambers.
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| 3. Work-in-progress photo-limited yield after the spacer 2 clean varied over time with the wet SC1-SC2 cleans performed in various tool sets, but the cryogenic aerosol process is stable. |
Increased product yield is the ultimate goal of the increased, consistent defect density reduction. Compared to the previous POR, the new process increased the absolute yield by 1.8% (Fig. 4 ). This became the new POR for the pre-spacer 1 and spacer 2 nitride depositions at the fab.
Next, we tested the AspectClean's effectiveness on finer device geometries. To achieve zero damage on 40 nm polysilicon structures, an additional modification was made to the process. A new nozzle containing more holes with smaller diameters was developed to deliver a smaller average aerosol size. The nitrogen aerosols perform better than the argon aerosol process, with respect to eliminating damage. Coupling the new process with the new nozzle at 60° resulted in a PRE of >81% and no damage.
We then optimized the nozzle angle. A 45° angle is optimal for particle removal, but not for damage-free cleaning. Figure 5 shows the relationship between PRE and nozzle angle. The ability to rotate the nozzle between 45° and 75° allows the selection of the highest level of particle removal without damage.
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| 5. The ability to rotate the nozzle between 45° and 75° allows the selection of the highest level of particle removal without damage. |
Chamber pressure also impacts cleaning performance, which up until now was maintained at 50 Torr. Decreasing the chamber pressure increases the PRE (Fig. 6 ), and should be combined with the nozzle angle to optimize performance.
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| 6. Varying chamber pressure is another way to optimize PRE. Decreasing the chamber pressure increases particle removal. |
Altis Semiconductor replaced its POR at the post-gate etch, pre-spacer deposition clean. Inline defect density dropped 12%, and absolute yield increased 1.8%.
Nozzle angle and chamber pressure can be optimized for the most efficient cleaning without damage. Smaller nozzle openings further reduced damage. The new process demonstrated zero damage on 40 nm polysilicon lines, with a PRE of 82% (>90 nm particles).
| Author Information |
| Jeffrey M. Lauerhaas is a member of the technical staff at FSI International . |
| Carlos Morote is an applications engineer at FSI International. |
| Jean-Philippe Plé is a process engineer at Altis Semiconductor for wet etch and clean. |
| References |
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| Acknowledgments | ||
| The authors would like to thank Thomas Kane, Jerry O'Dwyer, Greg P. Thomes, Thomas J. Wagener and James F. Weygand for the efforts with this work. Also, IMEC provided the wafers for the 70 nm polysilicon line evaluation of Figure 2 . | ||





