The Advantages of Capping Copper With Cobalt

Electromigration (EM) is a well-known reliability problem, caused by electrons pushing and moving metal atoms in the direction of current flow at a rate determined by current density. This can eventually lead to the thinning of the line and higher resistivity or, worst case, a line break. Fortunately, not every interconnect line on an IC has current moving in the same direction all the time — that's mostly in power supply and ground lines. But as lines get smaller — the International Technology Roadmap for Semiconductors (ITRS) calls for a ~0.7× reduction in the linewidth for every technology node — it becomes more of an issue.
 
"Because you're shrinking your geometry, you're increasing your current densities, and electromigration just scales to become a more dominant effect," noted Ted Cacouris, product management director for the electroplating product line at Novellus Systems (San Jose). "Where are people starting to worry about this? It starts to hint at 65 nm, where people are looking at modifying their integration strategy to accommodate some improvements in electromigration. That's an indicator that it's starting to impact their design rules."

Bill Lee, director of marketing at Blue29 (Sunnyvale, Calif.), an equipment supplier focused on developing electroless solutions to prevent EM, added, "A lot of the current density issues are in the power and ground line because the current is always flowing in one direction. Power and ground lines can take up a third or more of the interconnect plane. If your power and ground lines, which are already large, have to be made even bigger to handle this directional electromigration issue, then on some products the die will have to be bigger just because of that." That, of course, goes against the grain of what the semiconductor industry is trying to achieve: smaller die at lower cost with increased functionality.

In aluminum lines, EM is a bulk phenomenon and was eventually well controlled by the addition of small amounts of a dopant; copper, as it turns out. EM in copper lines, on the other hand, is a surface phenomenon. It can occur wherever the copper is free to move, typically at an interface where there is poor adhesion between the copper and another material. In today's dual-damascene process, this happens most often on the top of the copper line where it interfaces with what is typically a SiC layer, but it can also happen at the copper/barrier interface. With each technology node, the problem worsens. "As you narrow down the features, you have more surface compared to volume of copper wire," Cacouris noted.

The solution to EM problems (as well as related stress voids, another common reliability problem) has been a story of process integration: optimized depositions, pre- and post-wafer cleanings, surface treatments, etc., all aimed at getting good adhesion between layers so atoms don't move around. In the dual-damascene process, trenches and holes are etched in the dielectric, then lined with a barrier material such as TaN, followed by the deposition of a copper seed layer, copper electroplating, copper CMP and then a dielectric stack, such as SiC/low-k/SiC. In this complex process, there are plenty of opportunities for problems. For example, since an oxide readily forms on copper on exposure to air, good adhesion requires good post-CMP cleaning and removal of that oxide before the next process step. It's also important to remove all the copper residue from the surrounding dielectric field, for reasons that will soon become clear (hint: new copper capping processes require high selectivity and copper residues will act as unwanted nucleation sites).

Good process integration is easier in today's advanced single-wafer processing systems, where several steps are achieved sequentially in the same chamber. Such systems also enable the addition of a new step (new as in the 130 nm generation), where a copper silicide is formed by exposing a clean copper surface to silane. "EM performance has much to do with the interface at the copper to dielectric capping. Anything you can do to remove the copper oxide, such as with an ammonia plasma process, followed by silicide formation, will help," noted Michael Yang, general manager of the ECP division at Applied Materials (Santa Clara, Calif.). "There have been continuous and recent improvements on the dielectric capping process, including the latest improvement in silicide formation. That should offer a new baseline for any other technologies."

But other technologies are almost certain to be required, perhaps as soon as the 45 nm node. As Lee notes in a paper published last year,¹ attempts to improve copper/dielectric adhesion using various surface treatments prior to dielectric deposition provide some near-term relief, but ultimately this interface must be fundamentally changed, or current densities will be restricted to the low 10⁶ A/cm² regime.

An alternative approach that promises one to two orders of magnitude of improvement in EM performance is a selectively deposited cobalt-based capping layer (Fig. 1 ). But that's not the only advantage of cobalt capping. The addition of a cap layer allows current density to be dramatically increased, and it could enable a change in the material of choice for the etch-stop dielectric layer (now typically SiC or SiN), which would decrease the effective k value of the dielectric stack. This, in fact, could be the main driver for cobalt capping, with improvement in EM performance as almost a side benefit. But issues remain: It is still unclear whether a CoWP cap by itself (with no dielectric cap) can provide an adequate barrier during oxidizing processes, such as dielectric deposition and resist strip.²

1. A cobalt-based capping layer, selectively deposited on top of the copper after CMP by electroless plating, provides two main advantages: a significant improvement in reliability by increasing electromigration performance, and an improvement in RC because of a reduction in effective k of the dielectric, since a dielectric etch-stop layer may be eliminated. (Source: Applied Materials)

As shown in Figure 2 , two electroless deposition methods have been developed — or are under development — to achieve this. One involves the deposition of a palladium activation layer on top of the copper. An electroless cobalt solution then reacts with this palladium to form what is typically a CoWP layer. The industry has had the most development experience with this approach, led by IBM (White Plains, N.Y.), with work dating back to the late 1990s. The use of a palladium activation step is falling out of favor due to its detrimental effects: increased line resistance due to palladium diffusion into copper and copper etch loss, corrosion of the Cu/BM interface, and extra cost.

2. Two different methods have been used to deposit cobalt-based capping layers, one requiring a palladium activation layer (top). The other is a self-activating process (bottom), which is in some ways simpler, but requires a more unstable chemistry. (Source: Applied Materials)

Electroless CoWP deposition is self-aligned to copper and forms a smooth conformal film. Depending on process conditions, this layer can be amorphous or pseudo-epitaxial to follow the underlying copper grain structure. The film is typically 90% cobalt in nanocrystalline form with 2% tungsten and 8% phosphorus. The tungsten and phosphide stuff the cobalt grain boundaries, while the cobalt forms the majority of the interface to copper, forming metal-metal bonds with adhesion energies of 40 J/m², compared with metal-dielectric bonds of 10^-20 J/m².¹ The amount of tungsten in the film directly relates to the film's stress. Figure 3 is a schematic of a tungsten-containing electroless cobalt deposition process. In this process, the cobalt species in solution is reduced by the reducing agent, either phosphorous-based (e.g., hypophosphite) or boron-based (e.g., dimethylamine borane), at the copper surface, whereas the tungsten species is co-deposited through the reduction by the same reducing agent, forming the tertiary alloy CoWP or CoWB. When phosphorous-based and boron-based reducing agents are used together, a quaternary alloy CoWPB may be formed.

3. A tungsten-containing electroless cobalt-deposition process. (Source: Semitool)

The second approach to cobalt capping is a self-activating process that is in some ways simpler in that no palladium is required, but more complex in that it requires a trickier (i.e., more unstable) deposition chemistry. Tom Ritzdorf, director of ECD technology at Semitool (Kalispell, Mont.), explained, "It's less complicated in that you have fewer process steps so you need fewer chambers and have the capability of getting to higher throughputs if you're doing multiple chamber sequential process. It can be more complicated from an equipment standpoint because of the relatively less stable chemistries typically used for the self-activating processes."

The self-activating approach is potentially simpler and less costly, but there's another advantage. "One concern with the palladium activation processes is that, after you put on this film, it experiences subsequent thermal cycles in BEOL processes," noted Yang of Applied Materials. "Papers have suggested that palladium diffuses into the copper so you actually have an increase in line resistance. If you can do it with a self-activation process — put cobalt directly on copper — you don't have this problem."

Cacouris of Novellus added that the selectivity of the palladium-activated process is also a concern. "It's a bit of a challenge to get it to work in a perfectly selective mode." Cacouris said the self-activated chemistry is "a little more challenging from a process point of view and chemistry point of view in managing it, but intrinsically it's better suited for giving you the type of selectivity you're looking for. The downside of it is you need to have a clever way to handle this chemistry, it's usually operated at a higher temperature than room temperature, it's unstable so there's no free lunch, so to speak." According to Yang, Applied Materials is addressing this problem with a low-metal-concentration formulation for self-activation process with a point-of-use chemical mixing scheme.

The improvement to EM resistance is dramatic. Figure 4 shows how CoWP can provide a >20× improvement in EM lifetime, showing results for capped and uncapped copper lines.

4. CoWP can provide a >20× improvement in EM lifetime, showing results for capped and uncapped copper lines. (Source: Applied Materials)