Advanced Metrology Offers Process Control, Higher Yield
Alexander E. Braun, Senior Editor -- Semiconductor International, 9/1/2005
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Advanced metrology can be broken into integration for process control, which provides feedback and feed-forward capabilities to improve the process and reduce the number of wafers wasted in process control, and standalone tools principally used for feedback, not feed-forward, such as CD-SEM, cross-sectional SEMs, dual-beam, etc.
"Hurdles arise at the unexplored 65 and 45 nm regions," said Izak Kapilevich, project manager for application and metrology at the etch group of Applied Materials (San Jose). New structures, aggressive aspect ratios and materials are introduced, the latter requiring different approaches and metrology equipment calibrations. Integrated metrology (IM), such as optical CD (OCD), will require novel ways to develop models faster because, when a process is introduced, a six-month wait for a model is unacceptable.
Kapilevich pointed out that an etch system with integrated OCD capabilities could do feed-forward and feedback process monitoring. It would have a closed loop for monitoring wafers as they come in, are etched, and move on. Tighter parameter control would make it possible to feed forward and fine-tune etch recipes, saving wafers and time. The predicament is that a fast and reliable integrated OCD system requires a model library accommodating every foreseeable scenario: different materials, layers' optical properties, etc.
The LER question"CD-SEM does more than CD measurements," Kapilevich said. "There's need to do LER and LWR measurements and characterization; etch recipes must be optimized not just for CD uniformity and performance, but also for LER striations."
Dean Dawson, marketing director of semiconductor AFMs at Veeco Instruments (Woodbury, N.Y.), views LER on resist as a significant part of the CD budget at 65 nm. "AFM is probably the only technique, except for cross-sectioning, that can directly measure LER without modeling or averaging, because it takes a direct 3-D measurement over features such as a poly gate," he said. CD AFM will complement current metrology, which is struggling to accurately measure LER and LWR, and tends to underestimate these parameters.
At 65 nm and beyond, TEM cross-sectioning will increase because accurate profile metrology will be needed. Increasingly, device makers avoid SEM cross-sectioning, choosing TEM cross-sectioning to get the required resolution and accuracy level. This is expensive and labor-intensive. The industry has accepted 3-D AFM as an alternative for critical layers. It is faster, non-destructive, and cheaper.
According to Applied Materials, vias and contacts have becomes complex, requiring the measurement of 2-D features and features at different orientations, with vias and contact of varied shapes and sizes. Results must look at the overall performance of the feature's edges. This demands high-resolution SEMs. Also, measurements are being done on devices, rather than test structures, requiring non-destructive measurement techniques. At higher voltages and dosages, a SEM provides better resolution, but it can also destroy what it measures — undesirable when measuring multiple sites on a wafer. This is a hurdle when considering low-k maerials, particularly with the new ArF and KrF resists, and wafers introduced into the SEM with a preexisting surface charge induced by preprocessing, affecting electron domain.
Gregg Higashi, Applied Materials' CTO for the front-end products group, pointed out, "Ellipsometry tries to determine thickness; unfortunately, at <50 Å, you cannot uniquely determine both a film's refractive index and thickness. You must assume a refractive index and extract the thickness from that."
Applied Materials recently developed a decoupled plasma nitridation (DPN) film. Nitrogen abundance alters the underlying films' dielectric constant, converting the gate oxide into a medium-k material that reduces the leakage resulting from a very thin film; however, this also changes the refractive index. Applied Materials has found XPS to be a suitable metrology for these plasma nitrided films, because it can determine nitrogen concentration and consistently solve for equivalent oxide thickness. The conundrum is high-k, because there will be the film stoichiometry of a complex multi-component system containing hafnium, silicon, oxygen and nitrogen.
Todd Henry, product marketing director for the fab products division of FEI (Hillsboro, Ore.), sees a metrology inflexion point at the 65 and 45 nm technology nodes, with materials and structures introduced to support performance needs and higher packaging densities driving the transition — things like finFETs for the gate level. Profile measurement requirements are becoming complex, and traditional measurements are inadequate. At the shallow trench isolation level, device manufacturers measure profiles along with X and Z directions. As nitride on top of the active layers becomes thinner, that measurement is also needed (Figure ).
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| This copper/low-k contact example demonstrates how critical measurements are already in the <10 nm range, demanding ultrahigh imaging contrasts and measurement tool precisions in the 0.1 nm range. The zoomed region shows how advanced imaging tools will increasingly be needed to identify root causes of ultrafine buried process defects. (Source: FEI Co.) |
Conventional CD and scatterometry approaches, adequate for simpler structures (the straight line, the basic contact shapes, even capacitors), are running down, leading to a shift to cross-sectional measurement. Eventually, these techniques will be transitioned into production process control as finer measurements become necessary. Cross-sectional metrology does not replace CD-SEM and scatterometry; there will be a mix-and-match strategy of conventional approaches, along with 3-D cross-section and measurement. There will be cross-sectional metrology with SEM, but this transition will require even high-resolution techniques in the fab, such as STEM.
Hidden systematic error
Kevin Monahan, vice president of technology for the parametric solutions group of KLA-Tencor (San Jose), believes 193 nm immersion lithography will be dominant throughout the 32 nm node, resulting in increasingly complex interaction of designs with shrinking process windows and a concomitant impact on parametric yields in early production. "Even now, the errors we find in early production are mainly systematic, rather than random," he said. "The future is likely to be much more difficult."
With SEMs, the trend is from simple CD measurements to more yield-relevant, shape-based and design-based metrology. With scatterometry, it is from CD and sidewall-angle measurements to more yield-relevant, multi-parameter profile-based metrology. Traditional box-in-box overlay measurement is transitioning to more accurate grating-based metrology and, in some cases, in-chip metrology. "The goal is uncovering hidden systematic error that was not observable using previous-generation tools," Monahan said. "Actually, there are at least four types of hidden systematic error: unobservable, unsampled, unmodeled and uncorrectable."
As an example, consider the situation before scatterometry. It was difficult to define gate structure profiles using CD-SEM, and supplemental measurements using an AFM were often required. Now, scatterometry can measure the details of a gate profile (particularly notching and footing), which are more sensitively correlated to electrical performance and yield than the original CD-SEM measurements. For SEMs, footing and notching were unobservable hidden errors.
Unsampled errors are also a concern. "Many sampling plans fail because they haven't sampled enough or with sufficient detail," Monahan said. Lot-to-lot sampling is common. Wafer-to-wafer sampling is becoming a global best-known method in feed-forward scatterometry implementations. In feed-forward APC, 25 wafer per lot sampling is common and can be done effectively with standalone metrology tools. After lot-to-lot or wafer-to-wafer sampling is implemented and appropriate corrections made, the remaining high CD variation source is within the wafer. Thus, the next challenge is cross-wafer and cross-field correction. Sampling must increase again to satisfy these requirements.
Unmodeled systematic error can arise in both CD and overlay applications. Interactions between wafer location and field are often ignored. In overlay, higher-order unmodeled error can arise from thermal stress, asymmetric deposition, and other process-induced distortions. Then there is unmodeled in-chip error caused by lens aberrations and mask fabrication.
The fourth category of hidden systematic error is uncorrectable error. Such error is not easily managed using standard APC strategies in the fab, particularly in the case of reticle-originated intrafield errors. For uncorrectable error, a long-loop DFM strategy may be more appropriate, where design data is fed forward to fab metrology and fab data is fed back to design to optimize the process window. Fundamentally, the objective of design for manufacturability is to enlarge the yield window for a given device, while the objective of APC is to keep the process within that yield window. In the future, both will require much greater feedback of process metrics.
On the inspection side, Brian Duffy, senior director of marketing for KLA-Tencor's wafer inspection group, sees a continuum of problems — those being addressed and those to be considered in terms of pattern-related problems or systematic mechanisms.
"One is the discovery of unknown pattern-related problems. This is a concern to device makers because the feed-forward mechanisms in place cannot uncover everything that occurs," he noted. The discovery factor is crucial, and methodologies are needed to fix problems and verify that the fixes are in place. Because of the challenges of stacked process tolerances, controls must be in place. The scope of the problem addressed on the inspection side by high-end scanning inspectors is the litho resolution enhancement technique (RET) verification process. It is possible to modulate the litho process on a field-by-field basis and leverage die-to-die inspection technologies to verify RET algorithms at the wafer level.
"Metrology areas, such as CD and profiling, aerial imaging, film thickness measurements, defect and particle measurements, are in flux," said Peter Gise, director of marketing at Nanometrics (Milpitas, Calif.). "As we progress toward 65 nm, CD-SEM and aerial imaging are reaching their limits. Scatterometry is becoming a complementary metrology, primarily for optical CD, although it has use for diffraction-based overlay. However, we're able to squeeze out capability with things like different targets and fine-tuning the overlay optics, and can probably push aerial imaging to 45 nm."
Jon Madsen, engineering manager for platforms at Nanometrics, sees a blurring between film thickness and 65 nm OCD measurements. "These were two discrete measurements. Now we're moving from doing measurements in scribe lines to active areas," he said. "Film thickness measurement in the scribe line will be adopted in the device active area at 65 nm to get process control. Test targets are being designed in the scribe line. To measure film thickness, you need scatterometry; it is being used in more processes and more layers." Lithography will be the focus for APC at 65 nm, with every litho step having a scatterometry tool.
Moshe Finarov, CTO for Nova Measuring Instruments (Rehovoth, Israel), also sees scatterometry as an alternative at 45 nm. "Measurements must be made within the die pattern because of a lack of correlation between die and test sites on scribe lines," he said. "Since it's practically impossible to ensure a spot size that's compatible with the actual design rule, the measurements must be implemented on complex 3-D structures, requiring different modeling capabilities from those that currently exist." Measurement results mapping will need more measurement points on the wafer, requiring higher throughputs. Most processes will be associated with comprehensive APC schemes, and a majority of process tools will use IM.
Christopher Morath, director of marketing at Rudolph Technologies (Flanders, N.J.), agrees that film thickness and OCD measurements are converging. "Measuring film thickness on planar structures does not necessarily meet process control requirements at the 65 nm technology node. Manufacturers are adopting patterned test structures that more closely resemble how the process will perform on actual die. This trend will be accelerated with the introduction of advanced transistor architectures, where the gate dielectric will very likely be wrapped around a silicon bar, creating a 3-D structure. To achieve true gauge capability for ultrathin patterned films, such as gate dielectrics, laser-based scatterometry techniques will be essential."
Optical keeps upPeter Rosenthal, technology manager at Philips AMS (Natick, Mass.), discussed optical infrared reflectometry metrology applications in DRAM manufacturing. "As trench DRAM scales, it's harder to measure with historical techniques such as AFM; this is driving the acceptance of model-based infrared reflectometry. AFM, in particular, has encountered major obstacles in measuring high-aspect-ratio trench depths, profiles, and recess structures as the nodes have shrank. Infrared techniques have demonstrated a scalable capability to measure a variety of geometric parameters on many different trench structures, at speeds and sensitivities needed for online, high-volume production."
New nodes and materials make control problems harder to manage, requiring extensive sampling and APC-type techniques. A fast, non-destructive metrology adaptable to a variety of sampling strategies is an enabler. Michael Gostein, chief technologist for Philips AMS, discussed the importance of this with acoustic measurements applied to copper. "As linewidths narrow, you get additional hurdles on the copper electroplating process side, such as difficulties with the superfill on the narrower lines. Tight copper electroplating control benefits from high-speed metrology and APC-type feedback loops," he said.
Model-based IR metrology (MBIR), similar to scatterometry, relies heavily on modeling, verification and calibration using reference techniques such as SEM. This can increase the burden up front to releasing a new application. However, MBIR, because it is less sensitive to geometric scattering, involves a much simpler calibration process than 3-D scatterometry. The payoff is fast, multi-parameter measurement capability that can be applied directly to the device structures. In addition to the current approach of calibrating metrology algorithms against reference measurements, there is a growing appeal to correlating model parameters directly to electrical parametric test results and yield.
Tom Larson, vice president of ReVera (Sunnyvale, Calif.), also sees a challenge in the introduction of additional materials in process modules. "This presents significant complications for metrology technologies insensitive to material composition variations," he said. Obvious examples are transistor gate dielectrics and DRAM capacitors. In the gate, the introduction of plasma nitridation for SiON has changed the yield monitoring strategy's scope, with nitrogen concentration variation control becoming the principal requirement. At 45 nm, many gate dielectrics will change to some form of HfO2 or HfSiO4, requiring additional compositional sensitivity and control. For DRAM, the quest for more memory in a smaller space requires high-k films; some variety of ternary ALD HAO.
Neal Sullivan, vice president of technology for Soluris (Concord, Mass.), sees three advanced metrology demands. "First, high-aspect-ratio structures — especially in DRAMs — the very deep, very small contact holes. We must be able to clearly image the bottom of these structures in order to ensure the quality of the contact.
"The second is pattern-limited yield. The move from defect-dominated to pattern-dominated processes, driven by low-k1 (subwavelength) lithographies, has CD metrology implications. Critical dimension metrology has evolved into critical shape metrology. Uncontrolled variability in feature shape not only degrades the accuracy and repeatability of CD measurements, it is a critical process parameter in its own right, showing direct correlation and predictive value for transistor performance.
"The third concern is productivity. The narrowing of process windows and the move to 300 mm wafers has resulted in a need for higher-density sampling plans. Device manufacturers will demand throughput improvements to mitigate increased metrology costs."
Dan Engelhard, senior applications engineer for Timbre Technologies (Santa Clara, Calif.), recognizes that process windows are becoming smaller and more complex. "Although we talk about a 65 nm node, the actual CD is smaller when formed into the polysilicon; the process window orbits around this smaller feature, not the half pitch." Not only are sampling requirements rising, but control applications based on metrology have gone from lot to lot, then wafer to wafer, to within wafer, to finer levels of control as well. The number of points is rising, making IM more attractive.
IM has yielded both expected and unexpected benefits. "When users first started to implement IM for CD metrology on tracks and etchers, they saw it as a CD-SEM replacement that enhanced productivity," explained Bob Monteverde, director of marketing at Timbre Technologies. "IM improved cycle time and reduced the number of wafers at risk. But then, as users started collecting IM data on tens of thousands of wafers, they started seeing signatures in the data caused by wafer-to-wafer process variation; signatures that had been invisible with the traditional lot-to-lot sampling. Moreover, these signatures could direct the process engineer to the root cause of the variation, and eventually to a fix."
As we approach 65 nm and look toward 45 nm, more measurements will take place because processes will have more sources of variation with high-NA immersion lithography, advanced gate trim, more CMP layers, etc. Other requirements will appear, such as fine control on bake plates, control of focus and dose on the scanner. Soon, advanced metrology will become everyday.
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| Applied
Materials | Bede X-Ray
Metrology
| FEI Co. |
| KLA-Tencor | Nanometrics | Nova Measuring
Instruments |
| Philips
AMS | ReVera | Rudolph
Technologies |
| Soluris | Timbre
Technologies | |
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