Company News
Staff -- Semiconductor International, 7/1/2005
Silicon Debug Consortium Formed
At the Design Automation Conference in Anaheim, Calif., EDA, test and silicon debug companies announced the creation of the Design-for-Debug (DFD) Consortium to address silicon debug challenges and collaboratively define the tools needed. Members include Fidel Muradali and companies including Corelis (Cerritos, Calif.), DAFCA (Framingham, Mass.), First Silicon Solutions (Portland, Ore.), Intellitech Corp. (Durham, N.H.), JTAG Technologies (Stevensville, Md.) and Novas Software (San Jose).NEC Implements Design-for-Yield Technology
NEC Electronics Corp. (Tokyo) will be using model-based DFY yield analysis technology from Mountain View, Calif.-based startup Ponte Solutions Inc. NEC said it would use Ponte's technology to augment its process analysis system and internal research. "NEC Electronics possesses vast experience in process analysis and has developed several internal methodologies to analyze and continually improve process technology," said Eiji Konishi, general manager of the test analysis technology development division at NEC, in a statement. "Ponte Solutions' model-based technology has shown excellent correlation to our own analysis of random defects, and we look forward to using it for researching systematic defects in leading edge technologies." Ponte was founded in 2002 and has received funding from several venture capital firms. •
