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Process Complexity Fuels Integrated Metrology

Alexander E. Braun, Senior Editor -- Semiconductor International, 7/1/2005

At a Glance
True APC requires integrated metrology, particularly with the introduction of new materials and architectures, and increasingly smaller process windows, especially beyond the 65 nm node. The concept has proven itself with CMP, and etch is following along. However, end users expect a balance between real need and the economic realities of inserting integrated metrology into processing platforms.

From the 65 nm node on, integrated metrology (IM) will be integral to advanced process control (APC). Essential for chemical mechanical planarization (CMP), when used in the measurement of film thickness and film optical properties, IM is already important for the characterization and qualification of process steps. As quick process characterization increases in importance for fast ramp-ups and APC becomes essential to keep in spec crucial processes with ever-smaller windows and growing complexity, IM will come into its own (Fig. 1 ).
 
CMP leads the way
 
Now that IM and CMP are inseparable, Liang Chen, general manager of Applied Materials' CMP Division (San Jose), views end users' demands for wafer-to-wafer repeatability as a potential issue that suppliers must address for ≤90 nm technology nodes. "CMP focuses on removal. The challenges we're resolving are how to make wafer-to-wafer removal constant; how to make device-to-device, die-to-die, wafer-to-wafer electrical performance consistent, as device rules become more stringent. The solution to meeting these challenges is to use advanced integrated metrology with closed-loop process control."

Although IM modules in CMP tools are common, the IM information must be used wisely. There are two mainstream CMP processes: dielectric CMP and copper. For dielectric CMP, the focus is wafer-to-wafer repeatability. The first wafer is pre-measured, goes into CMP for processing, and is afterward measured again. This information is gathered and analyzed inline. The control algorithm is fundamental because it defines post-measurements — the CMP process' results. The next wafer may get an adjustment in removal range, the third match the second, etc., accomplishing wafer-to-wafer repeatability.

Because of different incoming profiles for copper CMP, IM must be in situ to adjust removal rate differences by reading the wafer. So copper CMP performs removal of the copper toward the barrier, and barrier to the dielectric. Control of the copper's selectivity and its removal is critical, and in situ metrology does real-time profile control.

1. Although several drivers are usually seen furthering the inclusion of integrated metrology, 300 mm fab productivity will be the major impetus for full-fab advanced process control. (Source: Nanometrics)

IM, etch and data

The industry is in the early stages of integrating metrology to etch systems.

"Scatterometry is etch's metrology of choice," said John Yamartino, senior member of the technical staff for etch at Applied Materials. Besides compactness, another advantage is speed; measurements take seconds per site and no vacuum system is required.

While current optical CD metrology is adequate, future difficulties lie in controlling the CD based on the data. It becomes necessary to understand, characterize and quantify all variation types and sources. For instance, feed-forward control for gate etch is mature — it looks at what comes out from lithography and compensates when it goes into etch. However, as precision requirements increase and new effects appear, this becomes increasingly difficult. Material variations, lot-to-lot variations, and even process equipment's stability come into play. OEMs must develop a flexible system that allows compensations to be coded into the controller once the variation's nature has been quantified and qualified. However, this requires considerable data manipulation flexibility, and an IM system's capability to intelligently deal with this data is vital.

Another difficulty with processing smaller architectures is that cumulative effects more readily affect yield. These must be addressed singularly — on a process-by-process basis. The user must set up APC throughout the fab by treating each tool as a component, setting up data transfers and controlling in that way. Additionally, control should be done on the tool itself. This addresses control needs for that particular step while managing cumulative effects. The information is then available to the host for broader process control schemes.

"IM is part of our APC equipment control strategy," said Rick Gottscho, vice president, FEOL and BEOL etch group, at Lam Research (Fremont, Calif.). "The traditional approach has been to correlate process signals — signals from an etcher, a CVD machine, a litho station — to the ultimate yield on the wafer." Aside from some exceptions, this has been largely unsuccessful because of the weak connection between any one process and final wafer yield — too many variables. There are interactions between litho and etch, between etch and deposition, and between deposition and litho, ad infinitum (Fig. 2 ).

2. Reduced fault detection latency, capital cost, footprint and cycle time are all considerations in the adoption of IM. Assumptions in this graph include 30,000 wafer starts/mo. for in situ photoresist gate application. (Source: Lam Research)

Although software enables this work, the primary approach is to use tool sensor data to guarantee the unit process' output. OEMs rely on end users' integration know-how to generate sets of requirements and specifications for a process such that, if the tool is within that specification, good yield can be forecasted.

IM or standalone?

The industry struggles over the IM or standalone metrology conundrum. Should IM be on the track or the etcher? Here, it seems to offer an advantage over standalone. Looking at feed-forward, with IM, it is economically feasible to measure each wafer coming out of the litho cell, multiple points of the wafer, and either do wafer-by-wafer correction or within-wafer corrections.

Then there is feedback, where a wafer is measured and, if out of spec, the recipe is corrected; instead of feed-forward, where the output of the litho cell is measured and fed forward. Short of a catastrophe, litho reworks are avoided. It is the most expensive cell in the fab and feeds multiple etchers. If measurements are done in the litho cell and rework is necessary, the most expensive tool becomes a bottleneck. Overwhelmingly, the choice is doing the fix in etch.

IM on the etcher simplifies logistics; everything can be self-contained, resulting in faster adjustments and avoiding host access or peer-to-peer communication concerns. Also, on the etcher, it can be used for fault detection, which is valuable because, if something goes wrong, the wafer latency between fault detection and fault occurrence is minimized so that, worst case, only one wafer is scrapped. With a standalone metrology tool, there can be a wafer latency of ~45 wafers between detection and occurrence.

Controlling variability

"IM should change into what I call 'integrated actionable metrology,' something that doesn't just spew data, but indicates where to look and what to do," said Anantha Sethuraman, vice president for product marketing at FEI Co. (Hillsboro, Ore.). Sethuraman added that design-for-manufacturing (DFM) will soon be a major growth area, and metrology providers must make their systems more than just data geysers: What action should be taken? What is the process marginality coming down the line? How serious is the drift?

The industry struggled to meet the wafer ID requirement. All wafer manufacturers had to provide a wafer ID and OEMs a wafer ID reader, as did the inspection and metrology companies. Sethuraman believes that, for IM to be successful, a "chamber ID" should also be included. "A fab may have 25 to 30 tools with three chambers each — some 75 chambers — and IM information pours out from them. If anything goes wrong and a drift occurs, it should be possible to pinpoint it to the chamber," he said. IM should be linked with an APC system that transfers data both ways and provides an intelligent input showing that, for instance, a problem in the PVD line originates from a particular chamber, and on a specific wafer ID.

Brian Trafas, vice president of marketing for the parametric solutions group at KLA-Tencor (San Jose), sees crucial transistor control challenges taking place at the FEOL. "Lithography, primarily 193, will be a key patterning technology challenge through the 32 nm node," he said. There will be an interaction with more complex designs, meaning that second- and third-generation OPC shrinking process windows will impact parametric yield in production. "We're opening up that gap in terms of wavelength and printed feature size, and seeing a roughly 30% decrease in the process window with every design node," he added.

IM can address these issues. An example is coping with gate CD variability using spectroscopic CD metrology. Some look to implement wafer-to-wafer control for the photoresist trim application. At 65 nm, controlling a CD on a gate layer for the right level of performance has shifted from a lot-based to a wafer-based control approach. As we progress toward 45 nm, additional metrology information is needed. Instead of lot-based CD information, the requirement is for lot-to-wafer-based, and from CD only to CD plus profile, shape and roughness information — essential for feed-forward and feedback control (Fig. 3 ). This means a more comprehensive CD control solution — a combination of CD-SEM and optical CD.

3. Standalone scatterometry tools are currently used in feed-forward APC applications to control gate and STI dimensions. The potential advantage of integrated tools in these applications vs. SEMs is significant reduction in cycle time. (Source: KLA-Tencor)

While SEM and imaging technologies are extendable to 45 nm, there is ongoing work to extend algorithms to provide combinations of profile, shape and roughness information to enable decisions. There is interest in measurement accuracy standards, as well as in matching across multiple tools, and providing correlation across different technology types; for example, from optical CD to CD-SEM.

"As we go from 90 to 65 and to 45 nm, we require more measurement data to support multi-variable control at the lot, wafer, field and die levels," Trafas said. According to him, it is not sufficient at some of the critical process steps to just look at lot-based sampling. With 300 mm, the interest in wafer, field and die-based sampling plans has increased. Obtaining the analysis to support that type of multi-variable control requires sophisticated data mining. The strategy has been to use the tools' analysis capabilities to move rapidly from data to information, knowledge and value-based decisions — rather than just spewing raw measurements. It is possible to build into the analysis information about process tool states and where on the wafer an excursion occurred. Along with yield and performance data, this information can be used to increase the yield relevance of measurements, to optimize sample plans, and to control measurement cost. "Our goal is to achieve the lowest cost-per-yield-relevant measurement," Trafas added.

To IM or not to IM

"Unless a tool has an unstable process, most people are reluctant to add IM to it," said John Heaton, president and CEO of Nanometerics (San Jose). This has been the main argument against IM, with CMP the one big success. Heaton believes that, at 65 nm and beyond, the same will be true for the litho cluster; keeping the patterning process in control will be a major problem, requiring IM in the process tool for quick feedback.

Fab economics tend to determine metrology. The fab qualifies every process tool whenever it changes a reticle or process flow. If they change the reticle for layer 1 or 2 of a device, then a qual wafer — usually a blank or test wafer — is put through. This requires verification on a metrology system, and the time between when it is done processing on either litho cluster or some other process tool can be as much as 6 minutes. This scenario assumes no bottleneck or other wafers being processed. The lag time of getting the wafer to a standalone tool and the information back to the process tool can result in a 10% throughput reduction in an extremely expensive process tool. IM is becoming important, not so much from a process control standpoint, but as an enhancement to preserve tool productivity.

While at the 45 nm node, cumulative process step variations will create more unforgiving situations. There is no product that takes data from either an integrated or standalone system to improve the process. This has been a barrier to large-scale IM adoption. If a metrology system measured each wafer, and the information was used in the process tool, it would result in better overlay, CDs and film thickness. Data is not enough — it must be acted upon. Excursion management — especially in lithography for 45 nm — will require IM.

Bents Kidron, marketing director for Nova Measuring Instruments Ltd. (Rehovoth, Israel), agrees with this. "IM will propagate from CMP to etch and litho," he said. "Process data will be used up and downstream, becoming a part of the control scheme, using more advanced control schemes."

Kidron believes IM faces the same challenges as standalone systems: The need for full-shape characterization, 3-D and in-die measurements calls for smarter algorithms. He does not think that future nodes hold unsurpassable challenges, and views scatterometry as a viable solution for needs beyond the 32 nm technology nodes. "APC with feed-forward and feedback capabilities is gaining acceptance; control engines are in place, and their sophistication (single input, single output, to multiple input, multiple output) will grow over time," he said.

When every wafer is measured and data obtained in real time, it can be used either for feed-forward or feedback scenarios for tighter control processes, especially at the 65 and 45 nm nodes where lithography's limits will be stretched and optical CD applications must be well controlled. IM's major growth will probably occur at 45 nm, because it is a lithography inflection point. Best current estimates view this node as optical lithography's last hurrah. After 45 nm, EUV lithography, or alternatives such as e-beam, may become necessary.

IM and value

"Integrated metrology is a natural progression to process tools that adds critical value to both the integrated device manufacturer and equipment manufacturers," said Radha Sundararajan, integrated metrology product manager in the etch group at Tokyo Electron. "For etch process, many customers view 65 nm as a critical node to implement this, and others view 45 nm. One important criteria is that the metrology tool should be viewed as part of the process tool in terms of throughput, uptime, MTTR, etc."

"We see IM that is ready for prime-time right now," said Robert Monteverde, director of marketing at Timbre Technologies (Santa Clara, Calif.). "Our customers have effectively implemented optical digital profilometry (ODP) in production today at 110 nm and 90 nm for litho IM and etch IM." He went on to point out, "Two different groups in the fab gain benefit from IM: Production uses IM to improve fab cycle time and reduce wafers at risk, while the equipment engineers use IM data to improve process tool parameters, such as focus, dose and bake-plate temperature."

Integrated inspection

Christopher Morath, marketing director at Rudolph Technologies (Flanders, N.J.), sees benefits in integrated inspection. "By checking every wafer after processing, you get early warning of excursions. This significantly reduces the number of wafers at risk in any excursion. Reducing inspection latency allows you to troubleshoot the tool and bring it back into production quickly. Also, scrap or rework decisions can be made automatically and instantaneously, avoiding wasted resources on bad wafers. Lithography processes, in particular, offer significant potential for yield recovery from appropriate rework decisions."

"The challenge with inspection in general and integrated in particular is the considerable amounts of defect data generated," said Rajiv Roy, senior director of marketing at August Technology (Bloomington, Minn.). "These data must be reviewed to separate nuisance defects from killer ones, which requires ADC [automatic defect classification] that works at a higher rate of accuracy than what is available. Today, the state-of-the-art is in the 70 to 80% range; something in the 95%+ range will be required."

IM will tweak a process and change a variable or parameter on a wafer-to-wafer, run-to-run, or within-wafer environment. For inspection, that model does not work. The model that makes the most sense is that of fault detection and classification and its use in the line to monitor tool health, as opposed to tweaking a process parameter. Inspection is inclined toward tool monitoring. For example, in a resist track, one may want to know if a nozzle is spraying resist in the wrong direction.

As with IM, because of the complexity of the algorithms and software, reliability for standalone inspection is still insufficient. The volume of generated data can bog down the bandwidth of any process tool that it might be hooked to. A way to handle it separate from the process tool is needed.

Users sometimes look at IM as just another module that goes into a tool and works. The reality is that any metrology, particularly IM, can be very complicated because it is a system within a system that requires a high level of sophistication and expertise to support. The time is here for IM to be an integral part of production, not just because of the dream of process control, but also because of the vast economic benefits associated with having fabs run efficiently.


When you contact any of the following manufacturers directly, please let them know you read about them in Semiconductor International.
Applied Materials August Technology FEI Co.
KLA-TencorLam Research Nanometrics
Nova Measuring Instruments Rudolph Technologies Tokyo Electron
Timbre Technologies   

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