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Wet Clean Achieves Solution for Cu Interconnects

Maria A. Lester Associate Editor -- Semiconductor International, 2/1/2001

Challenged by the onslaught of copper interconnect structures, wet cleaning processes are rising to the task. Many companies using copper structures use a very dilute aqueous HF-based cleaning process for wafers after via and trench dry etch and ashing. One alternative, a two-step process for cleaning based on this very dilute aqueous HF-based cleaning process, is aimed at enhancing the effectiveness of the HF solution.

The first step of this process, which was developed by Mattson Technology Wet Process Division (Exton, Pa.) and UMC (Hsinchu, Taiwan), is a mild oxidation step consisting of a dilute H2O2 solution 36:1 and a surfactant with megasonics irradiation. This step removes some polymer residues and the sputtered copper on the sidewalls, and oxidizes the copper surface. The first step can be used without a surfactant. The second step is a very mild oxide etch with dilute HF/HCl, where the HF concentration is 600:1 and the HCl concentration is 240:1. This step undercuts the polymer residues and removes both leftover sputtered copper from the sidewalls and oxide from the copper surface.

Four process parameters are essential to the success of this process sequence. First, control of the dissolved oxygen concentration is needed so that the copper loss can be controlled at ~1.4 nm. The second parameter is prevention of exposure to light, which can cause photo-induced corrosion of copper. The third parameter is the use of fresh solutions for each batch of wafers. This prevents copper build-up in the bath, which could build up and redeposit on the front and backside of the wafers. Lastly, megasonics is needed for complete polymer removal.


Two-step cleaning with H2 O 2 and the very dilute HF solution results are shown, before (left) and after (right). (Source: Mattson Technology)

The researchers found no roughening of Cu surfaces in this two-step process. In fact, the haze decreased from 11.0 ppm to 10.8 ppm. Particle measurements on clean bare copper wafers showed no particle addition after cleaning. However, the process etched some copper where 2.25 nm PEOX was etched and 3.2 nm of SiN was etched. From bare copper wafers, results showed 1.4 nm of etched copper. The measured CD bias change was 0.015 µm. Watermarks were not found and all polymers were removed (Figure). In addition, this process was done on PECVD oxide, SiLK, Coral and Fox with no detectable damage to the standard oxide or the low-k dielectrics.

Thus, this two-step process can be integrated and used to effectively clean vias and trenches. Looking ahead to 300 mm integration, this process also has the flexibility for application in a single-wafer format.

For additional information on clean processing, go to www.semiconductor.net/clean
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