ADC Uses Optical Sampling and Clocking
John Baliga, Associate Editor -- Semiconductor International, 2/1/2001
 |
The input train goes to photodetectors on the chip, which are connected to differential integrate-and-dump amplifier circuits, which convert the pulses into an electronic signal for the converter. The converter is a resistive ladder with comparitors and other formatting converters.
The clock signal for the integrate-and-dump amplifiers and the converters comes from the same reference used to control the sampling laser pulse train. It is converted from an optical to an electrical clock signal on-chip.
The OEIC is made using the InAlAs/GaInAs/InP material system (Fig. 2). The InAlAs and GaInAs layers are grown epitaxially on an InP substrate, and vertical devices are defined by mesa etching. Optoelectronic devices made with this system are well suited for the common fiber communication wavelengths in the 1.3 — 1.6 µm range, and many types of high-speed electronic devices can be made in it as well.
|
|
Many other types of electronic devices can be made in this material system, such as high-electron mobility transistors (HEMTs), or planar metal-semiconductor-metal (MSM) detectors. One advantage of the approach used here is that one epitaxial stack can be used for both detectors and transistors. Some other approaches require a custom stack for each type of device, sometimes requiring selective growth in the middle of device processing
|
|
REFERENCES
1. T. Broekaert, W. Ng, J. Jensen, D. Yap, R. Walden, "InP-HBT Optoelectronic Integrated Circuits for Photonic Analog-to-Digital Conversion," Procedings of the 22nd IEEE GaAs IC Symposium, Nov. 2000.
2. R. H. Walden, "A Review of Recent Progress in InP-Based Optoelectronic Integrated Circuit Receiver Front-Ends," International Journal of High-Speed Electronics and Systems, Vol. 9, p. 631-642, 1998.
For additional information on emerging technologies, go to www.semiconductor.net/emerging
