Addressing 0.13µm Yield Management Issues
Laura Peters, Senior Editor -- Semiconductor International, 1/1/2001
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Tom Long, vice president of corporate marketing at KLA-Tencor Corp. (San Jose), joined the company in 1991 as vice president and general manager of its reticle inspection division. Previously, Long held managerial positions in wafer fab and yield management at LSI, Synertek, Philips Semiconductor and Fairchild Semiconductor.
SI: At 0.13 µ m, what are the greatest yield challenges?
Long: The front-end-of-line challenges include shallow junction control, gate oxide thickness control and charge control. Resistance measurement is still dominated by the use of four point probes, but there are other techniques starting to come on stream, particularly for measuring the thickness of copper. Back-end-of-line challenges revolve around implementing copper and low-k dielectrics. Some companies have built their last 200 mm fabs, so about a third of new purchases are for 300 mm.
One of the biggest challenges is in lithography: learning how to utilize and control 193 nm lithography along with OPC and phase-shifting techniques. Reticles have become key technology drivers. Customers are using shorter UV wavelength inspection tools with sophisticated algorithms to look at OPC and phase shifting.
Then, as you move into CD control, process latitude has narrowed significantly, increasing the need for advanced process control at critical levels. Customers want a turnkey method of controlling pattern transfer, from reticle manufacturing to the etched feature.
SI: What new tools are available?
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| Tom Long (Source: KLA-Tencor) |
SI: What are the crucial issues with copper?
Long: Among the 13 major copper damascene development labs in the world, our tools are the key tools for controlling those processes. Our turnkey copper control solution, which spans both physical and electrical control, is being well received. Yield learning for copper damascene is complex because there are new materials and new deposition methods. The smallest defect can propagate and cause a failure. In copper CMP, the difference between the hardness of the oxide and the copper in the trenches has not been easy to overcome.
SI: What are the key issues with 300 mm?
Long: From the perspective of classical particle defectivity, the 300 mm process tools are pretty good. We're seeing more systematic uniformity problems, particularly in CMP and etch. Naturally, specifications are becoming tighter as we shrink design rules, but they are also becoming more difficult to meet due to non-uniformities. So we've seen increasing demand for our e-beam inspection system as well as new brightfield UV systems, which can better find systematic defect problems.
SI: Will companies do more on-product measurements with 300 mm?
Long: We originally thought that would be the case. But we are finding, at least initially, customers are buying a higher proportion of our Surfscan unpatterned wafer inspection tools for their 300 mm lines. Wafer cost has been dropping dramatically and most fabs are building reclaim areas to reuse test wafers five to six times. With unpatterned wafers, we offer sensitivity down to less than 50 nm, but on patterned wafers, it is not possible to find 50 nm defects consistently in a production environment. Customers want to control their tools to 50 nm at the 100 nm node. That requires more sophisticated technology on product wafers, the process is much slower, and the cost of ownership is much higher.
Some work has been done on low-cost sensors, but their sensitivity on patterned wafers is around 1 µm.
In general, I think we will see a mix and match in production.
SI: What is the prospect of integrated metrology?
Long: We have more than 150 people working in that area. However, what may make more sense throughout new fabs today is distributed metrology and inspection localized in process bays. This gives you higher frequency monitoring, with the results people have become used to with stand-alone tools, at a much lower cost. •
For additional information on yield management, go to www.semiconductor.net/yield.
