RF Tests Becoming Indispensable

Leading semiconductor producers have recently conceded that wafer-level RF measurements are acutely needed to develop and produce advanced ICs. To a certain degree, this flies in the face of the 2003 recommendations by the ITRS Technical Working Group for Modeling and Simulation, which states, "The parameter extraction for RF compact models preferably tries to minimize RF measurements. Parameters should be extracted from standard I-V and C-V measurements with supporting simulations, if needed."
 
One problem is that standard I-V and C-V measurements make the direct extraction of oxide capacitance (C_ox) impossible for ultrathin dielectrics because of high leakage currents and non-linearities. Yet, accurate parameter extraction is possible using high-frequency circuit models. The challenge is also increasing for other devices in high-performance/ low-cost digital, RF and analog/mixed-signal as the industry progresses toward the 65 nm node and beyond.

The recommendations for minimizing the use of RF techniques are predicated on the assumption that they cannot be made effectively, particularly in a production environment, which may have been the case in the past.

However, new parametric test systems now make fast, accurate and repeatable RF parameter extraction almost as easy as DC testing. Most importantly, measurement integrity has been brought to RF testing through automated calibration, de-embedding and extraction of parameters based on device under test (DUT) characteristics and automatic adjustment of probe contact characteristics. These developments eliminate the need for an RF specialist to guarantee good results. In the production fab, the automation host or the test controller can accomplish what used to require human intervention, based on intermediate test results or operational requirements. The system is qualified for on-wafer RF production test at seven semiconductor companies worldwide.

Whether you are manufacturing RF ICs on III-V wafers for cell phone infrastructure or high-performance analog on silicon-based technology, predicting final product performance and reliability requires wafer-level RF s-parameter measurements in development and production. These measurements are an important addition to DC data, offering significantly more information with fewer measurements than a DC-only test suite. In fact, a single two-port s-parameter sweep can result in extractions or resistance and capacitance parameters, which would normally require separate DC measurements and even separate structures to isolate the necessary information for process control.

Functional testing of power amplifier RF ICs is another application of this capability. The devices are extremely complicated, yet price-sensitive. Production testing at high frequency under low-bias conditions eliminates the power dissipation that normally prohibits wafer-level testing. Expensive packaging is eliminated from non-yielding devices. Known good die techniques can also be applied during wafer-level testing, which significantly improves the yield of modules where RF ICs are used.

IC manufacturers can also use wafer-level RF measurements to extract figure-of-merit parameters on various high-performance analog and wireless circuits. These include filters, mixers and oscillators. System-on-chip (SoC) device makers are looking to these sub-circuit test techniques to decrease their overall cost of test.

Characterizing equivalent oxide thickness (EOT) on thin SiO₂ and high-k gate dielectrics is critical in high-performance logic devices beyond the 130 nm node. RF measurements play an important role in accurate modeling of dielectrics by eliminating parasitic components that would prevent accurate representation of the C-V data by the traditional two-element model. This is no longer possible with the medium- and high-frequency capacitance (MFCV, HFCV) measurement techniques as the instruments introduce a series resistance into the measurement.

RF parameters extracted from s-parameter data, along with I-V/C-V data, are included in simulation models used by design engineers during product development. Advanced design tools require statistical models rather than a single parameter set. This allows optimization for yield and functional performance. If I-V and C-V parameters are statistically based and the RF parameters are not, then the model is non-physical and unreliable.

In some cases, such as inductors, the I-V and C-V information has very limited value. Q at the use case frequency, however, has a high value as a characterization and control parameter for inductors. The challenge in I-V and C-V is to understand when it is a primary indicator of product performance and when it is not. The primary indicators of performance for many analog and wireless devices are F_t and F_max. These are extracted RF parameters and need to be measured, ideally, beyond the third harmonic of the use case. For digital and memory products, I-V and C-V are high-value measurements for active and passive devices as long as the model for the devices remains simple. As previously mentioned, gate dielectric measurements have a complex model for C-V.

Unreliable measurements can hinder yield management. A bad measurement result on a good device is referred to as an alpha error. In a production environment, this may mean that a wafer has been improperly scrapped. The misleading ITRS information and the slow, painstaking process that many companies experience in their modeling labs combine to make engineers reluctant to adopt production RF measurements, believing they will have high alpha error rates.

It is also perceived that throughput and operational costs will be unacceptable and that a high level of technical support is required to interpret results. Low throughput on prior generations of RF systems resulted from unreliable calibrations and the need to repeat measurements because of contact resistance problems. Calibrations on these older systems also did not hold for different measurement frequency sets. High operational costs are also associated with manual probing of gold calibration standards, which have soft pads and expensive RF probes that wear out quickly with overscrubbing. There is also the false perception in the market that a special prober or chuck is required for wafer-level s-parameter measurements.

Additional concerns regarding RF measurements in production:

• Extensive test structure changes are needed.
• Results are unstable, varying tool-to-tool, operator-to-operator, and day-to-day.
• RF specialists must babysit every tool.
• Substantially different lot routing and operational workflow may be required.
• It is doubtful this can be a real-time technique.
• Lab-grade results are unlikely.

Nevertheless, by maintaining the status quo based on these perceptions, fabs are "flying blind" in the implementation of new designs and processes for RF ICs, new gate materials and other advanced devices. The consequences are design and process iterations that greatly increase costs and time-to-market, accompanied by lower initial yields.

A production solution

The key to making wafer-level RF testing a production process control tool is fully automated measurements. This means that a robot delivers the wafer, calibration standard, and probe card to where they are needed. In other words, a major test system design goal is absolute data integrity without human intervention.

Third-generation testers that are now available have features that allow this type of operation to 40 GHz. Being designed specifically for a production environment, these testers support an upgrade path from 6 to 65 GHz as applications change, unlike lab instruments.

Third-generation testers address the need to automatically de-embed and extract the measurements according to the DUT characteristics, which is a major technical challenge in getting reliable C_ox, F_max and Q results. These algorithms, coupled with improved interconnect technology and automated calibration procedures, allow fast and accurate RF parameter extraction from s-parameter measurements.

Simplified circuit model of a MOSFET device under test. The Cox measurement factors to consider are parasitic capacitance between contact pads and leads (Cp), contact resistance (Rc), lead inductance (LL), channel resistance (Rchan), and overlap capacitance (Cov).

Accurate de-embedding includes correcting random measurement artifacts. For example, any change in contact resistance in a system with 50 V characteristic impedance limits repeatability. Instrumentation manufacturers must identify all the sources of instability in RF measurements and design the test system to avoid them. Innovative design of the system interconnections improves the repeatability of the links between major system components.

Automatically measuring and correcting probe contact resistance, adjusting probe overdrive and initiating probe cleaning are other ways an instrument manufacturer can assure repeatable measurements. Good overdrive control and cleaning only when needed will increase probe life significantly, which reduces a major consumable cost (RF probes cost about $1000 each). This should also be part of the statistical process control of the tester.

With stable, known error budget and uncertainty characteristics, the Smith chart curves generated from collected data are free of non-physical artifacts; there is no need for specialists to analyze and interpret these results. In older systems, an expert in RF measurements was required to monitor data (i.e., curve traces of every measurement set), look for strange or unexpected results, and then analyze those results to make sure they represented process variations instead of measurement anomalies.

Improved logic in third-generation parametric testers makes continuous monitoring of RF measurement quality a reality and reduces or eliminates the need for support by RF specialists. With these systems, different production floor operators can get repeatable real-time results across a wide range of products and production tools. RF measurements are almost as easy as making DC measurements, which are also required to completely characterize wafer devices. In fact, one third-generation system can make DC and RF measurements simultaneously (see "Innovative Designs for RF Testing"). This system contains a number of other refinements that speed up throughput, making it practical to do high-volume wafer-level testing for process monitoring and control. These same features speed up measurements in the modeling lab without sacrificing lab-grade results, thereby shortening the development cycle and time-to-market. All this can be done without purchasing special probers through easy system upgrades. When the calibration standard is stored on the prober, the operational workflow is identical to DC-only testing, and is changed only during periodic maintenance cycles.