Depositing Magnetic Tunnel Junctions for MRAM Manufacturing

Magnetic tunnel junctions (MTJs) are a key ingredient for a new generation of spintronics (spin-transport electronics) device applications such as magnetic random access memory (MRAM), ultrahigh-density magnetic recording heads and spin-logic devices¹ because of their high tunnel magneto-resistance (TMR, up to 220% at room temperature)² and large and tunable ranges of resistance-area product (RA, from several Ω·µm² to kΩ·µm²). MRAM has tremendous promise as a universal memory that could replace flash, SRAM and DRAM.³ Huge market potential is seen for the new MRAM technology, in particular as embedded memory in combination with CMOS logic for all kinds of handheld devices.

A basic MTJ stack consists of two electrodes separated by a thin tunnel barrier such as Al₂O₃ or MgO. The two electrodes are ferromagnetic thin-film layers. Fabrication of high-performance MTJ stacks (which are usually composed of more than six thin-film layers) is one of the most crucial steps in MRAM manufacturing. The special requirements for MTJ stack deposition are very different from those for multilevel metallization in silicon semiconductor devices. The most important requirements, among others, include precise thin-layer controllability down to 0.01 nm, excellent material uniformity across 200 and 300 mm wafers, smooth surface (interface) morphology, fast multilayer deposition capability, controllable oxidation process for the thin insulating barrier, and low system cost of ownership.

These challenges cannot be met with traditional physical vapor deposition (PVD) systems using simple parallel target-substrate configuration. Currently, there are two types of specially designed PVD cluster systems that are capable of meeting these demanding requirements: linear dynamic deposition (LDD) design without fast substrate rotation, and non-coaxial oblique substrate-target design with fast substrate rotation.⁴ This article highlights the superior features of the LDD technology along with some comparisons between the two novel PVD designs.

A film deposited by a PVD cathode (usually DC magnetron sputtering) on a fixed wafer substrate underneath will not have a particularly good thickness uniformity because the erosion profile of the cathode will be imaged into the substrate. There are some techniques for overcoming this non-uniformity issue, such as rotating the non-coaxial wafer underneath the cathode or rotating an off-centered system of permanent magnets behind the target. For the case of the very thin films under discussion here, this method requires several tens of rotations to obtain the desired uniformity effect. Since the deposition time for the very thin film is short (e.g., a few seconds for about 1 nm and below), a very high rotation speed of the wafer is needed with implications of drawbacks: compatibility with ultrahigh-vacuum chamber, long-term mechanical reliability, and particle generation.

In addition, magnetic thin films usually require magnetic anisotropy induced by applying a magnetic field at the substrate during deposition. Unless the target-wafer separation is large, this rotation of the aligning field at the substrate level will interfere with the magnetron field from the target, resulting in plasma fluctuation that, in turn, influences the thickness uniformity and precise film thickness control. Large target-wafer separation, however, results in a very low collection efficiency of the deposition system — for example, most of the very expensive materials are deposited onto shields and not on the wafer.

On the other hand, the so-called LDD technology that moves wafers linearly underneath the target can achieve high thickness uniformity in large-scale deposition (up to 300 mm) without rotating the wafer. This LDD technology also bears other superior deposition characteristics such as good coating efficiency by using short target-wafer distance (TWD, ~2 in.), precise thickness controllability (by precisely varying pass speed of the wafer underneath the target) better than 0.01 nm, and mechanical reliability because no high-speed wafer rotation and movement are involved and no mechanical shutter is needed.

Figure 1 shows thickness uniformity of typical materials used in MTJ stacks over a 300 mm wafer deposited using the LDD-based PVD system. Thickness uniformity of σ<0.3% has been achieved for aluminum and ruthenium, which are the two thinnest layers used in MTJ stacks. All other materials of CoFe, NiFe, NiFeCr, tantalum and PtMn exhibit thickness uniformity of σ<0.6%. A specially designed electromagnet as part of the LDD PVD system generates a uniform magnetic field on the substrate, achieving exceptional magnetic uniformity. Figure 2 shows uniformity of magnetic skew of a 10 nm thick NiFe film across 200 and 300 mm wafers.

1. This chart shows thickness uniformity for different materials over a 300 mm wafer.

2. These maps show magnetic uniformity across the wafer for a film of Ta3/NiFe10 (in nm), for both 200 mm (left) and 300 mm (right) wafers.

It should be pointed out that samples with wedge-shaped layers over a large substrate (up to 300 mm) along the wafer motion direction can be realized by simply accelerating or decelerating wafer pass speed underneath the target. This wedged stack technique is very useful and efficient for evaluating thickness dependence properties of MTJ stacks over a large thickness range on a single wafer,⁵ such as thickness dependence of TMR and RA.

Surface (interface) smoothness is extremely important in multilayered MTJ stacks to achieve higher TMR and breakdown voltage, and lower interlayer coupling field (H_in) between the free (storage) layer and pinned (reference) layer, and tight distribution across the wafer. Long mean free path of ad-atoms in low deposition pressure promotes high surface mobility for ad-atoms at the substrate surface, resulting in smooth surface morphology.

3. Surface roughness was measured by atomic force microscopy for a typical bottom stack of Ta5/PtMn20/CoFe2.2/Ru0.8/CoFe2.2 (in nm).

LDD techniques combining short TWD (~2 in.) and low deposition pressure (fraction of mTorr) enable smooth film growth because of high surface mobility of ad-atoms with multiple-angle deposition. Ad-atoms arriving at the substrate in conventional sputtering with longer TWD are usually relatively collimated and have incident angles close to normal. The LDD technique results in more oblique incidence, since the substrate is moving in and out of the ad-atom flux. Also, because the TWD is small, the ad-atoms arrive at the substrate with virtually no gas phase collisions. Both these factors result in increased surface mobility along the plane of the substrate, leading to highly smooth interfaces that some specialists believe so far can only be achieved by ion beam deposition technology. Figure 3 shows surface roughness (measured by atomic force microscopy) of a stack of Si/Ta5/PtMn20/CoFe2.2/Ru0.8/CoFe2.2 (in nm), exhibiting an RMS of 0.20 nm without using any additional smoothing techniques. This is a typical bottom stack on which the thin barrier layer of aluminum oxide directly grows. These results indicate that LDD provides intrinsic low surface (interface) roughness, resulting in high TMR values and low H_in.

Superior characteristics of thickness uniformity, precise thin-film controllability and smooth surface of LDD give rise to a high magnetic performance in MTJs. Figure 4 shows TMR values of MTJ devices with an RA range of Ω·µm² to kΩ·µm² for a representative MTJ stack Ta10/PtMn20/CoFe2.2/Ru0.8/CoFe2.2/Al₂O₃(t)/CoFe1.5/NiFe4/Ta5 (in nm). The Al₂O₃ barrier was formed by first depositing a thin aluminum layer of thickness t, followed by either low-energy remote plasma (ECWR plasma source) oxidation process for high-RA (>50 Ω·µm², t=0.5-1.0 nm) MTJ stacks, or natural oxidation process for low-RA (<100 Ω·µm², t<0.6 nm) MTJ films. TMR values were obtained at room temperature using both lithography patterned junctions and the current-in-plane tunneling technique (CIPT)⁶ on unpatterned films. As can been seen, TMR as high as 73% measured by CIPT and 11% obtained from the patterned MTJs have been achieved for high-RA (~3 kΩ·µm²) and low-RA (~3 Ω·µm²) MTJ stacks, respectively. For low-RA MTJs of 10 Ω·µm² with naturally oxidized aluminum thin barrier (t~0.5 nm), >30% TMR value was also obtained. Since submitting this article, the Singulus R&D team has successfully demonstrated ultrahigh TMR up to 200% at room temperature with its proprietary MgO barrier technology.

4. TMR values vs. RA for MTJ stacks of Ta10/PtMn15/CoFe2.4/Ru0.7/CoFeB2.8/Al0.5/Ox/ CoFeB3.5/Ta5 (thickness in nm), where triangles correspond to CIPT and squares to patterned MTJs. Red squares are for CoFe2.2 as reference and CoFe1.5/NiFe4 as free layer, respectively.

Figure 5 shows a TEM cross-section view of a low-RA MTJ (RA~10 Ω·µm²) with the stack Ta/CuN/Ta/PtMn/CoFe/Ru/CoFeB/Al0.5/Ox/CoFeB/Ta/Cu/Ta, using CoFeB as the amorphous pinned layer to obtain a smooth aluminum oxide barrier. As can be seen, the thin aluminum oxide barrier of only 0.5 nm is still homogeneous and continuous, proving that an ultrathin, high-quality barrier is typically produced using LDD technology.

5. This TEM cross-section view of an MTJ stack of Ta/CuN/Ta/PtMn/CoFe/Ru/CoFeB/Al0.5/Ox/CoFeB/ Ta/Cu/Ta shows that the thin aluminum oxide barrier of only 0.5 nm is still homogeneous and continuous.

LDD technology also demonstrated excellent process repeatability and thin-film controllability. Figure 6 shows wafer-to-wafer variations for TMR and RA values obtained from patterned wafers. One sigma of 1.27% and 5.0% for TMR and RA has been achieved, respectively, where 5% RA variation corresponds approximately to 0.01 nm variation of barrier aluminum thickness.

With LDD technology, multiple cathodes can be assembled in one deposition chamber by keeping the footprint reasonably small, even for a 300 mm tool. The results discussed above relate to a 10-cathode/300 mm chamber in a cluster tool arrangement with additionally one oxidation and one pre-clean module. It is a very typical feature of the LDD that nearly no differences exist for depositing wafers of different sizes. Processes developed for one wafer size can directly be used for all other types of substrates, an important characteristic that will ease the transfer of results in the chain from R&D to large-scale production.

6. This graph of TMR and RA repeatability shows 1s of 1.27% and 5.0% for TMR and RA, respectively.

The high collection efficiency discussed above in combination with high-rate deposition, the low latency time between depositions of individual stack layers, and the effective handling of wafers in the cluster (only one deposition chamber needed to deposit all materials) results in a high throughput of ~9 wph for a typical MTJ stack Ta5/PtMn15/CoFe2/Ru0.8/CoFe2/Al0.8/Ox®30s/CoFe1.5/NiFe3.5/Ta5 (in nm). A second deposition chamber installed in the cluster will double this throughput to 18 wph, important for mass production.

Another benefit of the high collecting efficiency of the LDD is significant lower cost of deposition compared with long target-wafer separation designs, including the case of non-axial oblique deposition designs.⁴ For expensive materials like PtMn, IrMn or rutheneum, employing LDD will reduce the costs by at least a factor of 2 in the case of 300 mm wafer production.

Since LDD allows the use of adequately large targets without negative impact on tool footprint, the lifetime of targets enables the run of an LDD machine for about four weeks (24/7 production), until the next target-change and strip-and-clean downtime. In combination with a fast vacuum recovery after a scheduled downtime (16 hours until restart of tool qualification), this feature results in a high effective uptime.

Though self-evident, it should be mentioned that the forward-thinking design of the 10-target LDD cluster addressed above incorporates all technical gadgets imperative to operate such a tool reliably under semiconductor production conditions. Beyond the well-designed mechanics, all kinds of auxiliary means as well as very flexible software exist to make it easy to work with the innovative LDD multi-target PVD tool.