Glimpse Into Tomorrow: Nanotech Metrology

The future of nanotech metrology is being shaped in advanced laboratories such as NIST's (Gaithersburg, Md.) Nanoelectronic Device Metrology Project, headed by Curt Richter. The project team is developing metrology to enable new nanotechnologies (such as silicon-based quantum devices, molecular electronics and organic thin-film transistors) to supplement or supplant conventional CMOS devices. Richter makes the point that by "metrology" NIST means measurement as opposed to industry, which views it as online process monitoring. Thus, much of NIST's "metrology" industry would call "analytical characterization," which is what is needed today to meet future device needs.

NIST aims at developing metrology that will enable emerging information processing technologies to extend electrical performance beyond incremental CMOS scaling. Their approach considers two categories. One is molecular electronics — a bottom-up paradigm for fabrication with some self-assembly playing a role in it — which is different from typical CMOS-directed fabrication. Richter believes that some bottom-up processing will become important, and this will be a process fabrication area requiring metrology.

The other area is silicon-based nanoelectronics, a CMOS extrapolation, down to quantum dots and quantum wires fabricated from silicon. Here, the focus is on fundamental building blocks — the quantum dot and wire themselves — and how to extract physical dimensions and make test structures for the actual probing of nanocomponents' electrical properties, not just stray structure artifacts. Electrical metrology in test structures is a primary characterization need for these research devices and materials.

NIST pursues a broad-based approach by anticipating what will have to be measured and what a test platform to probe nanocharacteristics (not artifacts) would look like. Silicon-based nanoelectronics originates from a top-down approach, extending traditional fabrication approaches to the nano level. This requires one set of tools — how to measure an oxide or dielectric thickness on a 3-D object instead of a planar one, or correlating the test of an easily tested 2-D planar area so it directly relates to a 3-D area. For a bottom-up approach, different characterization tools are needed.

What metrology for nanotechnology will be like and how will it work is something being determined and developed in advanced research labs. (Source: NIST)

In molecular electronics, NIST is developing test structures to measure molecular monolayers' electrical properties. "These devices consist of a metal or a semiconductor covered by a single monolayer of molecules with a metal contact on top," Richter said. "The molecular monolayer must be fully characterized, so sophisticated spectroscopies are used for chemical and physical analysis to determine what every molecule is doing; for example, looking at the tilt direction — are the molecules standing up? — and then the electrical characterization of essentially a final device. Because a final device looks like a black box, each element must be considered separately to determine if there's a relationship between final electrical properties and electrical energy levels within molecules."

Another research area is silicon nanowires — basically finFETs or tri-gate FETs. However, instead of producing a short, fast transistor, a very long wire is fabricated to characterize the 1-D wire's properties. Extracting mobility is difficult because the dimensionality is so poorly known. A 50% accuracy on a 10 or 5 nm object without destroying it is considered state-of-the-art. Careful analysis suggests that carrier mobility in these structures is higher than in comparable bulk CMOS devices.

The atomic-level physical characterization needed for understanding nanoelectronic devices is extraordinarily problematic. A probe small enough to explore the nanodevice is required — almost the concept of quantum mechanics where the quantum-limited observer perturbs the system. An AFM tip is immense compared with some of the devices being fabricated. Much thought is devoted to how to transition the beyond-CMOS, the "out there," device concepts into viable technology. Many device structures will be proposed, which in the end will not survive; it is important to assess that early, to avoid wasting resources.

In my opinion, NIST needs two things: Adequate funding and industry cooperation. Particularly in government labs, a stable budget is always an issue. If it is serious about maintaining U.S. leadership in nanotechnology, Congress must realize it is nearly impossible to plan a years-long project without knowing what the budget will be six months from now. Nanotech also demands device-based industry collaboration. The basic kindergarten concept taught to toddlers equally applies here: Share.