Post-CMP Gets a Lesson From FEOL Cleaning: Toss the Brush

Brush scrubbers have become a mainstay in post-CMP cleaning, but for some process steps, the end results are just not clean enough. New studies by Ismail Kashkoush and colleagues at Akrion Inc. (Allentown, Pa.) showed that an advanced front-end-of-line clean process can provide cleaner wafers than the process of record (POR) for pre-metal oxide CMP clean. Batch cleaners that use megasonics to increase particle removal efficiency rather than brushes may allow better surface optimization. The best cleaning sequence was fine-tuned to prevent surface roughness or pitting, as well as minimal oxide loss.

Cleaning processes are measured by their effectiveness at removing particles, organic matter and metals. In addition to these criteria, all front-end cleans must minimize surface roughness and meet a strict budget for oxide loss. "We took our processes of record for pre-gate, pre-furnace cleans and went through a variety of design-of-experiments to find the best process sequence," said Kashkoush. The initial process sequence (AFEOL) involved ozone, followed by SC1, HF/ HCl, rinse and dry. Process times and temperatures were varied for optimal results, and a hot rinse was added after the SC1 step, along with megasonics in the SC1 step.

The engineers determined that, even with the megasonics and process modifications, the process was not aggressive enough for post-CMP wafers with their many contaminants. They decided to replace the initial DIO₃ step (5 minutes at ambient) with a dilute HF step. However, since this left the wafers hydrophobic, immediate processing in SC1 would etch the wafers aggressively and possibly cause damage.

"The hydrophobic surface is very sensitive, and if you introduce that to an etching species, it results in surface roughening, even pitting, that is known. However, if the wafers are passivated with native oxide, it helps, so by doing the HF step, rinsing with ozonated water and then going to the SC1, the ammonia did not attack the silicon and that has made the difference — providing contamination removal but less surface roughness." The cleaning sequence was qualified for 0.18 and 0.13 µm processing, and has been installed in one customer's fab for more than 18 months.

The Table summarizes the results associated with the various cleaning sequences. The final recipe was as follows:

• HF:HCl (1:2:200) for 5 min @ 24°C
• Rinse with ozone
• SC1 (1:2:30) for 6 min @ 70°C with megasonics
• Rinse with megasonics
• HF/HCl (1:2:200) for 5 min @ 24°C
• Ozonated rinse, dry

Another part of process optimization is tool-specific. Kashkoush noted that controlling bath concentrations in the SC1 bath, as well as the HF bath, is important to maintaining a tight oxide-thickness budget. "People used to ignore the impact of the SC1 bath, but with a budget of only 10 Å, you can lose 2 or 3 Å in the SC1 bath alone, which is too much. So we make sure the etch rate is predictable and maintainable in all processes, not just the etching tanks." He added, "You need to use the bath over 24 hours so we can adjust the chemicals and process time to achieve that budget run-to-run."

Being a batch process, the cleaning sequence shows ~2× improvements in throughput and cost of ownership relative to current single-wafer approaches. So what is the big hurdle to adopting this new cleaning sequence? "This issue now is integration," Kashkoush said. Single-wafer approaches have one great advantage: They are already integrated with the CMP tools. With its Gama system, Akrion is faced with convincing customers that performance advantages outweigh the inconvenience of integrating — or at least interfacing — previously integrated CMP and cleaning steps. "Once they see the yield increase, the technical solution will become the driver for integration," he said.

For additional information on yield management, go to www.semiconductor.net/yield