High-Res Brightfield Imaging Addresses Subwavelength Optical Inspection

The industry's transition from the 110 nm node to the 65 nm node will likely be done — at most leading semiconductor manufacturing fabs — in conjunction with the switch to 193 nm lithography. This change represents a major yield challenge because the combination of new resists, new mask sets and new lithography tools will generate several new, yet to be determined yield-limiting defects. Accordingly, appropriate defect detection processes will be crucial for the move to 193 nm lithography.

In particular, the industry's reliance on high-resolution brightfield inspection faces an increasingly difficult sensitivity vs. throughput challenge that will significantly increase inspection cost of ownership. Therefore, what is needed is the capability to detect all critical defect types (i.e., higher defect sensitivity) at high throughput, while lowering the cost of inspection.

Over the past few years, Negevtech has collaborated with Infineon Technology's Unit Process Development Group (UPD, Dresden, Germany) to address this challenge with a new form of inspection technology that gives brightfield imaging from either brightfield or darkfield illumination. Infineon's interest was to evaluate the capabilities of this new method for "resist-test" wafer inspection, beginning with current process technologies, but ultimately for the 90 nm node. This work placed special emphasis on capture rate for yield-critical defects and corresponding inspection speed.

For challenging after-development inspection (ADI) applications today, the so-called resist test is commonly used for inspection. When it was first introduced, it allowed ADI to be shifted from product wafers to resist-test wafers (e.g., a simple, minimal structure of resist on silicon or resist on oxide on silicon), thereby extending the application of advanced brightfield inspection systems (Fig. 1 ). While the simple structure of resist-test wafers enhances sensitivity, ultimately, as linewidths decrease, the improved sensitivity of conventional inspection tools results in slower throughput and more costly inspection.

1. Subwavelength lithography (left) and optical wafer inspection (right) trends, showing the introduction of resist-test wafer methodology.

Resist-test wafers increase defect contrast significantly, reducing the sources of nuisance defects and, consequently, increasing inspection capture rate. For example, when using a resist-on-oxide-on-silicon structure, the oxide-layer thickness can be designed to optimize optical reflectivity at the wavelengths of the inspection tool.

Infineon began using resist-test wafers in 2001. The goal of this application was more efficient monitoring of single-resist bridge defects on 170 nm technology wafers. The resist-test wafers were designed to match the structure of their DRAM wafers, and optimized to enhance the reflectivity for brightfield inspection. Adoption of this inspection technology led to a decided improvement in detecting targeted defects.

Subsequently, Infineon engineers extended the use of resist-test wafers to the 140 nm node for similar applications, and then to the 110 nm node to qualify 193 nm lithography. Today, resist-test wafers are used in Infineon's 200 and 300 mm wafer fabs for production monitoring at the 110 nm node and for lithography process development at the 90 nm node.

Ultimately, 193 nm lithography and the processing of 90 nm technology node wafers add increasing complexity to the resist-test wafer inspection method. For example, ultrasmall (~100 nm) single-resist bridge defects with low topography and poor contrast must be detected at throughputs that operations managers have come to expect using conventional inspection methods. Simply stated, the need is for high-resolution and high-throughput brightfield imaging that considerably increases image contrast for enhanced defect sensitivity.

The optical inspection challenge for the industry is fundamentally similar to what has been achieved over the years with lithography itself. Today, various techniques (for example, resolution enhancement, optical proximity correction and phase-shift masks) are used in advanced optical lithography to extend the printability of lithography tools (such as "subwavelength lithography," which began circa 1997 at the 180 nm node using 248 nm lithography). It is well known that wafer CDs are much smaller than the optical wavelength used to print them, which is at the root of using 193 nm lithography to fabricate 65 nm features.

The twist is that the optical wavelength of inspection technology has consistently lagged behind lithography. In addition, numerical apertures (NAs) used in optical inspection systems are smaller than in lithography tools. Inspection systems, however, increasingly need to detect defects smaller than the CDs that they "defect," preferably half the size of the CD.

Similar to what has been achieved with sub-wavelength lithography, to reach maximum defect sensitivity, optical wafer inspection for tomorrow's applications needs to make more use of possible techniques that enhance detection sensitivity, thus achieving subwavelength inspection (Fig. 1 ). The first example of subwavelength inspection is the use of resist-test wafers, which enable the detection of defects much smaller than the inspection wavelength by enhancing defect-to-background contrast.

Clearly, what is needed is more subwavelength inspection improvements put directly into inspection systems. Today's brightfield wafer-inspection tools, based on optical imaging with time delay integration (TDI) charge-coupled device (CCD) scanners, have evolved to where they use UV illumination and higher-NA optics. However, these systems are limited by signal-to-noise considerations; brightfield systems often use a very high degree of TDI (up to 96 stages) because of the lack of illumination energy. Because of this, it is difficult to implement defect contrast-enhancement techniques in conventional brightfield systems. One recent improvement added edge-contrast illumination to improve the contrast in high-resolution brightfield inspection.

Higher defect contrast has been achieved with laser-scanning darkfield systems, where defects usually appear as a bright dot on a black background. However, these are non-imaging tools and use a low-resolution laser spot with basically a coarse die-to-die comparison. They are capable of detecting small defects with a relatively large laser spot and pixel sizes. Although laser-scanning darkfield technology delivers a lower pixel rate than TDI CCD brightfield technology, it can achieve a higher throughput at a lower cost on CMP and deposition layers, for example.

Darkfield systems are popular for monitoring submicron defects in wafer fabrication. However, to detect smaller defects, these inspection systems must increase system optical resolution and use a smaller laser spot. Furthermore, to increase the defect scattering cross-section necessary for smaller defects, a more powerful laser with shorter wavelength had to be incorporated.

Overall, darkfield systems continue to lag behind brightfield inspection systems in the resolution needed for inspection beyond the 130 nm node. The fundamental need still exists for an inspection tool with high resolution and high defect contrast, operating at a high throughput with a reasonable cost of ownership.

In recent tests at Infineon to evaluate our high-resolution wafer inspection system, process engineers targeted detection and monitoring of single-resist bridging defects on resist-test wafers, among other defects. When bridging defects occur on product wafers, they have the most significant effect on yield (Fig. 2 ). This test work was initially done for 170, 140 and 110 nm processing. Detecting single-resist bridging defects at ADI is very desirable, as it enables timely process adjustment and avoids the defect being propagated during subsequent etch. These bridges can be either full or partial, both resulting from resist poisoning.

2. Various classes of submicron resist-test wafer defects and their increasing impact on yield. Defects shown vary down to 150 nm. (Source: Infineon)

Recipe setup for the tested inspection method allows selecting optical magnification, bright or darkfield illumination, and illumination intensity. These parameters can be selected to optimize the wafer image and defect contrast for inspecting resist-test wafers or other applications. In the tests, inspections were made at high and medium magnifications (the actual magnification values are proprietary) while keeping all other recipe parameters identical.

Our results from these tests revealed two major conclusions:

• For 140 and 110 nm technology wafers, all defect types were successfully detected by high-resolution brightfield imaging, using the same imaging conditions (Fig. 3 ). The conclusion here is that the selected imaging conditions were robust and insensitive to the differences in wafer-layer stack or technology.
• For extra pattern (bridging) defects, the capture rate is >70%, both for medium and high magnifications (Tables ). From this, we can conclude that we can use medium magnification with high throughput to monitor this defect type; this results in a more than 10× improvement in throughput.

3. Infineon’s defect Paretos for 110 and 140 nm resist-test wafers.

In the case of protrusion defect, the medium magnification delivered 40% of the high-magnification capture rate. This capture rate may be insufficient when qualifying a process or a new photoresist. However, our tests show that medium magnification can be used to monitor stepper performance inline.

Our overall conclusion is, from the tests conducted, that high-resolution brightfield imaging technology has considerable advantage for ADI inspection in production.