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"Biopsy" Techniques Challenge Destructive Testing

Alexander E. Braun, Senior Editor -- Semiconductor International, 10/1/2000

As wafers have grown from 150 to 200 mm, and now to 300 mm, "destructive testing" has become somewhat of a swear word. One increasingly hears people in fabs vowing that the day is fast approaching when they will never have to break up wafers - 300 mm or any other kind.

The reality is that at one time or another destructive testing must be done, because the information it provides cannot be obtained in any other way. The trick is now to get that same information more precisely, without necessarily breaking up the wafer entirely.

Technologies developed by companies such as FEI (Hillsboro, Ore.) and Infineon (San Jose, Calif.) have resulted in forms of structural wafer analysis designed to produce very fine and clean cross sections at particular points. This enables users to navigate multiple sites and do multiple sampling, without breaking up the wafer and sending it to the laboratory.

Companies involved in developing this type of testing abhor the term "destructive testing;" FEI prefers "biopsy testing," and "construction analysis" is Infineon's choice. Whatever the term, the method does an in-depth analysis - in effect, a biopsy of the structure. This can be done to a wafer that is functioning well, to better control the process, or to one that is known to be having serious problems.

CD-SEMs and defect review SEMs are powerful tools, able to garner considerable data and classify defects based on their morphology; however, this is statistical information acquired from a surface image, where the feature of interest - i.e., the defect - is buried below the surface (Figure).

A surface image of this tungsten plug (above) does not reveal the problems lurking below, which can only be shown in a cross-sectional view (below). (Source: FEI)

Today's multilayered metal structures - copper dual-damascene, for example - have sufficiently complex internal details that it becomes necessary to cut into the wafer to look below its surface, since the information necessary to control the process cannot be procured by looking at it top down, as a CD-SEM or defect review SEM would. Combination FIB/SEM systems are providing additional information not available with top-down approaches.

In the dual-damascene process, for instance, there is a seed layer that must be put down and must be conformal and of uniform thickness across a via structure. This information cannot be gathered in the detail required in a non-destructive way; it is not possible to look inside a via, at sidewall angles, or a layer's thickness on a structure's side, with the necessary detail in the traditional from-the-top manner.

In two or three years, we will have 0.10 or 0.09 µm features in production; determining what the coating thicknesses and wall angles are at those dimensions will become even more important. By then, biopsy-type testing probably will be the norm, with the ultimate goal being capability to do it in-line and then send the wafer on for further processing. Semiconductor engineers are uncomfortable with this, but this kind of testing already is being done by thin-film head manufacturers, with a dozen measurements being taken at any one point before the wafer is sent off for further processing.

Cutting into the wafer is likely to remain a necessity for quite some time. The difference is the process will go from the devastation of a break to the delicacy of a biopsy. 


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