Compliant Leads Double as Probes
John Baliga, Associate Editor -- Semiconductor International, 7/1/2000
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FormFactor (Livermore, Calif.) has developed a lead/probe technology based on wirebonding called "microsprings." Using currently available wirebond technology, gold wire is bonded to the chip, given an "S" or other shape, then "burned off." This leaves a piece of gold wire in the shape of a simple spring. After all of these "springs" have been made, they all are plated with another metal to add stiffness, then given a gold layer to improve contact characteristics.
The company has proposed a wafer-level packaging scheme using its microsprings called microspring on silicon technology, or MOST. The microsprings are attached directly to the die's bond pads, or to redistributed bond pads. Actually, since the wires must be shaped, they also can be used to perform redistribution themselves. The bug-like structure can be surface-mounted just like a land grid array, or the wires can be placed into plated through holes. The company recently published a paper that thoroughly spells out numerous applications for its technology.1
The conventional wisdom about wirebonding is that it should not be done directly over active circuitry on the chip, so that those circuits are safe from the combination of thermal and acoustic energy used. Wafer-level packaging technologies typically have an overcoat or interposer layer for moisture resistance or mechanical compliance, and for the wafer-level technologies that use wirebonding, that layer also takes up the acoustic energy from the wirebonding. FormFactor's packaging method also uses this approach.
State-of-the-art wirebond technology is capable of handling pitches down to 50 µm. The minimum pitch for peripheral I/O is, by definition, the same, and the limit for production area array pitches is ~225 µm. FormFactor's technology should be capable of probing any device at the die or wafer level.
Nanonexus (Fremont, Calif.), a spinoff of Xerox (Palo Alto, Calif.), has developed a contact technology that lithographically defines the contacts on a metal layer with a built-in stress gradient. Once they are patterned and released, the contacts simply curl up.
The metal film is sputtered onto a substrate at low temperature, and the stress gradient is built into the film by varying the argon pressure during the sputtering process. The company has demonstrated this technology using molybdenum/chromium films. The metal is sputtered onto the substrate, starting with a very low argon pressure, which makes the film compressive. The argon pressure is increased gradually so the film gradually changes from compressive at the start to tensile at the end of the deposition. Gold is added to improve contact characteristics.
After patterning and etching the metal film, the release layer holding the metal fingers in place is developed away. Typically, one third of the length of the probe fingers is kept in contact with the substrate.
The curled-up probe fingers have demonstrated good resilience. The temperature is never high enough to remove any of the built-in stress. An extensive study of their characteristics was presented at this year's Electronic Components & Technology Conference (ECTC).2
In addition to use as probes, these contacts have been used in flip-chip-type applications, and interconnect pitches down to 6 µm have been demonstrated. Since the probe fingers are defined lithographically, the linear pitch limit probably will be determined by material properties, not the fabrication process. If it is necessary to make all the fingers point the same direction, that may limit their two-dimensional interconnect density.
Both of these technologies can be used on chips and on probe cards. Also, leads made using these technologies can literally perform double duty as chip interconnects and contacts to probe cards.
REFERENCES
- J. Novitsky, C. Miller, "MicroSpring Contacts on Silicon: Delivering Moore's Law-type Scaling to Semiconductor Package, Test and Assembly," 2000 International Conference on High-Density Interconnect and Systems Packaging, Denver, pp.250-5.
- J. M. Haemer, S. K. Sitaraman, D. K. Fork, F. C. Chong, S. Mok, D. L. Smith, F. Swiatoweic, "Flexible Micro-Spring Interconnects for High Performance Probing," Proceedings, 50th Electronic Components & Technology Conference, May 21-24, 2000.
