MCM has Chips in Redistribution

John Baliga Associate Editor -- Semiconductor International, 2/1/2000

John Baliga
Associate Editor

Researchers from Fraunhofer IZM (Berlin), IMEC (Leuven, Belgium) and the Universities of Bonn and Wuppertal in Germany have extended the redistribution concept beyond the chip to make a multichip module. A popular material set for performing redistribution is copper traces in a benzocyclobutene (BCB) dielectric. The researchers used thin-film techniques with this material set on a depleted silicon wafer to create the MCM substrate. Individual dice were flip-chip attached onto the substrate (Fig. 1).

This technique was used to make detector modules for an experiment for the planned large hadron collider at CERN (Geneva).¹ It

1. The module uses 2 micron thick copper traces and 5 micron thick photo-BCB layers. Flip-chip attach uses 25 micron balls on a 50 micron pitch. (Source: Fraunhofer IZM)

does not differ greatly from other build-up substrate approaches. However, since BCB is a spin-on material, the possibility exists to embed a die, or passives, in the "substrate." After die attach, another layer of BCB would be spun on, and the process would continue. The die must be thinned to reduce the amount of BCB used, and handling the thinner die is a challenge the researchers seem to have met. When taken to this degree, this approach becomes a 3-D module.

According to physical and electrical studies of the interconnect system, using copper and BCB layer thicknesses of 3 µm, this technology can allow the creation of packages with 6000 I/Os per square centimeter (Fig. 2). This equates to an I/O pitch of 130 µm. Since redistribution with this material set is performed regularly by bumping contractors, the capacity for making these substrates should be readily available.•

1. J. Wolf, P. Gerlach, E. Beyne, M. Töpper, L. Dietrich, K.H. Becks, N. Wermes, O. Ehrmann, H. Reichl, "High Density Pixel Detector Module using Flip Chip and Thin Film Technology," International System Packaging Symposium, January 1999, San Diego.

2. Copper interconnect traces 20 µm wide with 25 µm via lands are built on a depleted silicon base to make an MCM substrate. The BCB dielectric was removed for clarity. (Source: Fraunhofer IZM)

Paper-Thin Package Enables High-Density Stack

At the SEMI Technology Symposium held in conjunction with SEMICON Japan, Takao Fujitsu of Toshiba Corp. (Tokyo) presented a paper titled "Paper Thin Package for 3-Dimensional Packaging." A dicing before grinding technique (see October 1999 Assembly & Packaging News) was used to thin the die to 50 µm, yielding a package 130 µm thick. Connection to the polyimide tape substrate can be done with either TAB bonding or anisotropically conductive adhesive (ACA) bonding of gold stud-bumped die. The company has made stacked memory modules using these paper-thin packages (PTPs).

Before making a stack, copper clad tape with a cutout for the die is added to the package to give it uniform thickness. The tape has vias filled with solder paste to provide I/O contacts accessible from both the top and bottom. The company has made stacked modules with 4 PTPs, having a total height of 520 µm. This module can be packaged in a BGA or an edge connector package using another layer of tape for redistribution. The packaged module takes the same space as a typical one-die package. •

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