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AMD Ships 90 nm, Reveals Operational Gains

Laura Peters, Senior Editor -- Semiconductor International, 10/1/2004

"In the mid-90s, AMD realized we would have to start doing business differently if we wanted to compete with a company 10× our size," reflected Tom Sonderman, director of automated precision manufacturing (APM) at Advanced Micro Devices (Sunnyvale, Calif.). Today, AMD is shipping 90 nm Athlon 64 microprocessors (Figs. 1 and 2 ) for notebooks, and is on track to deliver 90 nm dual-core products to add performance while limiting power consumption mid-next year. With the introduction of copper at the 180 nm node; low-k dielectrics, SOI and first-generation strained silicon at 130 nm; and soon second-generation strained silicon at 90 nm, Sonderman attributes much of the company's success to its ability to manage technology transitions in a complex manufacturing environment. "This strategy allowed us to get three exotic material changes behind us and be able to reap the benefits of those material changes as we paved the way to 90 nm."

Much of AMD's "different path" is related to its APM program (see Semiconductor International , June 2004). APM contains five components, including equipment performance optimization and product targeting. However, Sonderman says it is the APC, YMS and integrated production scheduling components integrated within APM that distinguish the company's manufacturing capabilities. "In a fab, you have to be able to control each process as highly as possible; you have to move material efficiently throughout the fab; and you have to be able to do good yield enhancement engineering to be able to continuously drive faster and faster yield learning as you're constantly pushing and changing the way your processes are running."

1. The current 90 nm transistor generation features Lgate of 50 nm, SOI and a triple spacer.

A hierarchical architecture to fab-level control allows complex decision making to be taken out of the hands of the individual. "In a closely coupled, controlled environment, we're able to create more sophisticated control algorithms and approaches to control than you would normally be able to accomplish in a more manual mode," Sonderman said.

A good part of yield learning in the beginning of a technology transition depends on having the right data at the right time. The company does not have a separate pilot line from its manufacturing facility, so late-stage R&D is performed in the fab. "We believe this improves the manufacturability of the process, and we're able to leverage the learning capabilities from the previous technology because, when we make a migration, we not only use the same data and information from the previous technology, but we're able to do it in the same environment." He added that, by tuning tools for each specific product (i.e., 130 nm bulk, 130 nm SOI, 90 nm SOI) and linking all tools together in the fab, "we don't run into data starvation issues when we introduce a new technology, so we have enough data to make informed decisions."

2. The 90 nm Mobile Athlon 64 for thin and light notebooks has a die size of 84 mm2.

The manner in which decisions are made has also changed over the years. "We really migrated away from time-based data collection methodology to collecting data based on process uncertainty — a concept called linear model predictive control, which we borrowed from the chemical processing industry," Sonderman explained. The model predicts how each lot will perform using the hierarchical control schemes in the fab and decides how best to run the lot. Then, based on process uncertainty, the engineers decide when the controller needs to take a piece of hard data.

Through this process, AMD has been able to reduce test wafer usage on its gate CD area by 90%. "We did this without introducing integrated metrology, which is an important point. We are able to control every single wafer that runs through our fab without measuring every single operation, using things like dynamic sampling and wafer-level tracking." In yield management, the company uses 70% internal and 30% external resources, utilizing Knights Technology's Yield Manager and Yield Dynamics' Genesis software in the Dresden fab, but with proprietary databases and software for wafer tracking. Sonderman added, "We've spent a lot of time figuring out how to handle the non-standard operating condition, and that has allowed us to create a complex computer-based environment that helps us manage new materials and change operating conditions very well."

For additional information on yield management, go to www.semiconductor.net/yield

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