Top Fabs of 2002

Amid an industry downturn, knowing which companies will remain standing once the dust settles is a difficult task, as was selecting the Top Fab of 2002. In acknowledgment of their staying power, Semiconductor International has chosen to recognize LSI Logic and SilTerra. LSI Logic was the first fab to integrate low-k materials, has survived the temperamental cycles, and has proven its longevity and excellence. SilTerra stood out with its leading-edge technology, operational excellence and an increasing demand for its foundry services.

LSI Logic's Gresham, Ore., campus manufactures CMOS ASICs with up to 32 masking levels. The facility came on-line in 1996 and achieved first silicon on 200 mm wafers in October 1997. Volume production began Nov. 30, 1998, on standard ASIC G10 (0.35 µm) technology. Current predominant technology is 0.18 µm. The fab comprises 91,700 ft² of cleanroom that utilizes SMIF mini-environment technology rated at Class M1. The site includes e-test, wafer sort and FA.

Operating within a high-velocity business culture, it rose to the challenge by accommodating rapid change and driving multiple product and process changes/improvements in tandem with increased operational effectiveness and efficiency.

LSI Logic's Gresham campus was the first fab to integrate low-k.

Integrated and linked operational and quality management systems via a computer integrated manufacturing (CIM) and information systems infrastructure enable the site's technical staff to rapidly access operational data, conduct in-depth structured analyses and execute effectual risk-managed decisions — all within a paperless environment. The high level of interconnectivity allowed for seamless registrations to the ISO 9002 and 14000 standards (in 1998 and 2000).

Personnel also have access to technical and management training classes, including an intensive five-week program designed for new operators. The site partners with Gresham-based Mt. Hood Community College to deliver the off-site curriculum, which encompasses hands-on training in a computer lab and mini non-production fab (including several manufacturing-similar cleanroom tools and systems).

The program has been designed to rapidly acclimate operators to LSI Logic's culture, language, systems and IC processes before they enter a real production fab environment.

LSI Logic uses an aggressive strategy to rapidly incorporate information and experience gained from earlier technologies into newer ones, enabling it to accelerate product qualifications and ramp-ups and reduce production and prototype cycle times to world-class levels. Subsequently, its learning rates for each technology ramp-up have consistently improved by 12-15% per month. LSI Logic's Gflx technology uses advanced features derived from previous technologies as well as cutting-edge industry developments. These include:

• Transistors with L_drawn=0.11µm and L_eff=0.08µm
• Mixed-signal components
  –MXS process elements fully characterized up to 20-40 GHz to support integrated rf/IF
  –Mixed-signal modules provide cost-effective integration onto digital CMOS process
  –Seven rf/mixed-signal add-on modules
• Dual oxide for MXS and I/O
• Inverter delay 14.5 psec

One of the roles of R&D process module development in Gresham is to shorten the learning cycle for new module development activities to the manufacturing organizations. This will permit manufacturing groups to get up to speed on new technologies for advanced transistor work, Cu metalization and advanced low-k dielectrics, thus increasing the speed and success of new technology transfers. This allows the manufacturing groups to receive early learning on these new process modules and have direct contact with the R&D process engineers.

Critical dimension and masking technology challenges are met in LSI's photolithography lab.

The Gresham facility has committed a significant portion of its resources to yield improvement strategies. Five separate groups — Quality Engineering, In-line Monitoring, In-line Process Control/Advanced Process Control, Parametric Testing, and Advanced Product Engineering — are chartered to detect, evaluate and control process/product anomalies/issues. A closed-loop automated Corrective Action System featuring a peer review process that guarantees upstream and downstream effects (in operations, environmental systems, safety, etc.) is considered in-depth and efficiently deployed to ensure root-cause closure of issues.

Contamination control protocols are defined and regulated in accordance with requirements of each construction project stage. As milestones are met, tighter protocols are introduced that range from simple daily sweeping of the raw building shell to super/continuous cleaning and strict garmenting protocols during tool move-in. Mini-environments are monitored 24/7 via the Facility Monitoring System and recertified regularly.

LSI Logic is recognized as an environmental leader in Oregon for efforts to minimize impact to the environment, as well as innovative partnerships with the Oregon Department of Environmental Quality (DEQ) and the Environmental Protection Agency (EPA). The facility also received the first Oregon Green Permit and charter membership in EPA's National Performance Track. Protecting the environment and ensuring the safety of LSI Logic employees and the general public is an essential component of the company's business strategy. It is the responsibility of all employees to help LSI Logic improve its environmental performance.

The site has hosted more than 100 customer audits since 1999. Upon close review of its quality and technical systems, every visitor has acknowledged LSI Logic's ability to meet end users' expectations in translating new designs and technologies into fully functional and reliable products for their use.

SilTerra Malaysia Sdn. Bhd. (Kulim, Malaysia) is a dedicated wafer foundry built from a green-field site. SilTerra's start-up team of more than 250 engineers and professional consultants received initial guidance from technology partner LSI Logic, which provided tactical advice on facilities, process and qualification. In a record 18 months, SilTerra completed construction, equipment installation and 0.25 µm process qualification, and produced the first yielding product wafer on Dec. 22, 2000. The company introduced both 0.22 and 0.18 µm processes within the next seven months. In addition, SilTerra was awarded ISO 9002 certification in June 2001, only months after operation began.

SilTerra is a dedicated wafer foundry built from a green-field site.

SilTerra is developing a 0.13 µm CMOS process that will use the latest tools and materials. These include 193 nm DUV scanners for its lithography process, high-aspect-ratio etch, dual-damascene copper and low-k dielectrics for intermetal barrier layers. The process will be in production in 2003.

The facility is a highly automated, fully integrated 200 mm wafer fabrication plant. It is producing advanced CMOS technologies with up to 33 masking levels. It provides foundry services for logic, mixed-signal, memory and high-voltage products using 0.25, 0.22 and 0.18 µm technologies. Low-power options for these processes are also available. The massive 472,000 ft² facility includes a state-of-the-art, 125,000 ft² manufacturing area. There is a 5000 ft² Class 1 cleanroom for reticle and wafer start; 95,000 ft² ballroom-style, Class 100 manufacturing area; 10,000 ft² Class 1000 support room; and 15,000 ft² Class 100,000 area for e-test, wafer sort and backgrind.

All of the equipment is SMIF-capable. The SMIF pods, in which the wafers are stored and transported between machines, provide an ultraclean, Class 1 mini-environment for the wafers to ensure extremely low defect density and high yield.

The CIM system is integrated into the corporate IT infrastructure, providing a seamless and paperless environment. It includes automated material handling systems (AMHS), material control systems (MCS), and equipment interface (EI), enabling the facility to achieve short cycle time and high line yield.

The facility boasts an aggressive ability to ramp from pilot to high volume — from 0 to 5000 wafers out per month in only three months after equipment qualification. The yield strategy focuses on identifying and reducing both random and systematic defects. The Corrective Action Defect Event Tracking (CADET) software keeps track of events such as equipment interruptions and anything that is not part of normal production. The company was able to increase initial yield from 30 to 85%, while reducing defect density from 0.14 to 0.09/in.² for 0.25 µm technology.

Diffusion sector at SilTerra.

The Failure Analysis laboratory is a 3000 ft², Class 10,000 cleanroom. It is equipped with a comprehensive range of cutting-edge equipment, including field-emission SEM, dual-beam FIB with sophisticated navigational software, ultrathin-window EDS system, optical/confocal microscopes, micro-cleavage system, front/backside emission microscope, IMS tester, and plasma-enhanced RIE. Current activities focus on yield enhancement and construction analysis of new processes.

One reason for SilTerra's operational success is effective implementation of its theory of constraint (TOC) strategy. The goal is to maximize utilization of the tools that constrain production flow to increase overall fab throughput. TOC is based on critical and starvation avoidance ratios. The critical ratio ensures that customer deliveries are met, while the starvation avoidance ratio guarantees that limiting tools are efficiently utilized. TOC dispatching rules consist of global and local area rules. The dispatch rules are to make sure that the objective of cycle time variability reduction considers all factors in the factory, including tools, area and overall fab behavior.

SilTerra adopted stringent safety standards from the U.S. Safe & Green Standards, and requires equipment vendors to be SEMI S2-93-compliant. Its philosophy regarding safety promotes prevention rather than recovery. The facility was designed with sophisticated safety features to protect its workers and the environment. They include remote shutdown; an NFPA-compliant fire protection system; a chemical containment pit, scrubbers and VOC abatement units to treat emissions from process tools; Class 1 Division 2 electrical fittings with ultraviolet/infrared detectors for flammable materials; armored electrical cables; fire-rated sealants for penetrations through fire-rate walls; security-authorized access system; and a computerized system with redundant units that automatically activate fail-safe features. The Emergency Response Team is trained by a professional organization that specializes in such functions. This enabled the company — after operating only a short time — to gain recognition from risk insurers and from the Department of Occupational Safety & Health of Malaysia.

SilTerra has implemented a virtual inventory management (VIM) system to effectively manage its supply chain. The VIM allows all inventories related to SilTerra to be visible in the company's enterprise resource planning (ERP) system. These include supplies and spare parts located in SilTerra's facility as well as those stored in the vendors' own warehouses. Inventory management is facilitated via e-mail pre-alerts to the operations staff when stocks of supply items fall below their pre-determined safety level. Supplies are tracked and ordered electronically through the ERP system. Vendors are required to deliver the requested items within four hours of ordering. The order and shipment activities are reviewed weekly in the consumption report.