Intel Brings EUV Into Line
Aaron Hand, Managing Editor -- Semiconductor International, 9/1/2004
Always the driving force behind the development of extreme ultraviolet (EUV) lithography, Intel Corp. (Santa Clara, Calif.) has again stepped forward to assert its lead in the implementation of the next-generation technology. The chipmaking giant announced early last month that it has installed the first commercial EUV lithography tool — the Micro Exposure Tool (MET) from Exitech Ltd. (Oxford, UK). In so doing, Intel has positioned itself to be the first company to deploy EUV lithography.
This revelation should not come as a surprise. Intel has stuck by EUV, leading development within the EUV LLC, and pushing companies throughout the supply chain to deliver on development goals. About a year ago, Intel announced that it would abandon its work in 157 nm lithography programs, opting instead to extend 193 nm lithography as far as possible, then move straight into EUV. Despite continued concerns about the power and reliability of lightsources, among a slew of other challenges, Intel has remained steadfast in its march toward EUV.
What Intel's latest announcement does is to flesh out some of the details of the chipmaker's latest work and bring the industry up to date on what the company contends is moving from the lab environment into the realm of pilot line production. Intel targets implementation of high-volume EUV production in 2009, at the 32 nm node, according to Ken David, director of components research. This puts Intel's 32 nm node implementation four years ahead of the ITRS.
Part of what Intel highlighted in its announcement was its joint-development programs with several key suppliers in the industry. Mentioning Cymer Inc. (San Diego) for development of the source, Media Lario (Bosisio Parini, Italy) for collector optics, and NaWoTec GmbH (Rossdorf, Germany) for its e-beam mask repair tool, David pointed to Intel's close work with suppliers as the cornerstone to developing a strong EUV infrastructure. "EUV development requires different resources," he said. "These suppliers are not suppliers that we typically work with. Brand new development requires different ways of doing business."
Currently using a discharge-produced plasma EUV source from XTREME technologies (Jena, Germany), Intel is working with Cymer to further develop a source that can achieve the necessary throughput. Intel believes the collector optics might become a consumable item in EUV lithography, David said, so the company has been working with Media Lario to make them cost-effective. NaWoTec's e-beam mask repair tool is a gentler and more precise alternative to traditional focused ion beam (FIB) repair tools.
Installed at Intel's RP1 fab in Hillsboro, Ore., the MET is integrated into a full process line, linked with an automated track system that includes resist coating and developing operations. A key aspect of the MET is that it can achieve a resolution of 30 nm, compared with the Engineering Test Stand (ETS, developed by the EUV LLC), which has a limitation of 70 nm. The resolution improvement will help in studying mask defect printability, and in developing resist processes. Also unlike the ETS, the MET line has a controlled resist dispense system, which is an important aspect for resist development.
Although falling within the accepted definition of a next-generation technology, Intel views EUV lithography as an extension of optical lithography, David said. Like optical lithography, EUV lithography uses reduction optics. While the current MET tool has a reduction ratio of 5:1, high-volume production tools are expected to have the same 4:1 ratio as today's optical tools. Accordingly, all the resolution tricks of extending optical lithography should apply to the eventual extension of EUV lithography as well.
The difference in EUV's optical elements is that they are reflective rather than transmissive because transmissive elements would actually absorb the radiation. Likewise, the key difference between EUV and optical masks is that the pattern is achieved by reflecting it off the mask rather than transmitting through it (Figure ). Continuing with its practice of developing masks in-house, Intel has established an EUV mask pilot line, including commercial EUV maskmaking tools, the NaWoTec e-beam mask repair tool, and a mask blank defect inspection tool from Lasertec (Yokohama, Japan). The EUV maskmaking process is aligned with its optical mask operations in Santa Clara.
For additional information on lithography, go to www.semiconductor.net/lithography
