Adaptive Test Adds Value to Wafer Probe
Bernd Bischoff and Uwe Schiessl, Texas Instruments Inc., Freising, Germany; Manfred Brenner and Steven Weinzierl, Keithley Instruments, Munich, Germany, and Cleveland -- Semiconductor International, 8/1/2004
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The 1999 SIA roadmap ominously predicted that in about 2012, the cost of test (COT) per transistor will surpass the cost of fabrication per transistor.1 Amid the continual pressure to lower the COT, several issues have become increasingly important:
- The growing numbers of products and processes being ramped while staffing and tooling numbers are being held to the same or a lower level makes higher test cell throughput critical for test engineers and managers.
- The higher die content of 300 mm wafers means process engineers need to learn about possible out-of-control conditions sooner to avoid putting more work-in-process (WIP) inventory at risk.
- Yield engineers are suffering from data overload — they need more information and less data.2
- The typical strategies fabs pursue to address these issues and decrease the COT include testing less, testing more efficiently, testing differently, and reducing the cost of the testers used.3 More efficient testing is usually accomplished by increasing raw throughput by using techniques such as parallel test.4 Adaptive testing5 combines more efficient testing and testing differently to allow electrical testing to add value.
Adaptive testing involves changing test strategies automatically, based on initial test results and established decision criteria. In other words, it is intelligent and flexible testing based on limits used for statistical process control. Our definition of adaptive testing is not simply changing control limits after measurements are complete.6 Instead, it involves changing force/measure levels or changing the number of test sites based on a well documented decision process. Three primary components of a test strategy can be changed on the fly: 1) type and number of tests; 2) number of die tested; and 3) number of wafers tested. Some or all of these test strategy components can be adaptively changed for operational benefit at the die (or site), wafer and lot levels.
Several characteristics of the parametric test cell in the fab make it particularly appropriate for adaptive test techniques. Parametric test uses a sampling strategy rather than measuring every die on every wafer, as in functional test. This allows adding or subtracting die as needed. Also, fabs typically measure three classes of electrical parameters on wafers, so tests can also be added or subtracted as needed:
- Informational/monitor parameters like ISUB (hundreds total). This often includes reliability parameters with long test times.
- Critical characterization parameters like Vt and Ion (~50 total).
- Super-critical scrap parameters like gate oxide integrity and via resistance (~10 total).
Parametric test data is critical for process control and incremental yield improvement, not primarily for binning finished ICs as in functional test. It is sometimes used to minimize the functional testing of "bad zones" on a wafer and reduce test cost. Additional data might also be needed for process diagnostics, data mining and aftermath analysis, often long after a lot is measured.
Parametric test involves measuring a wide array of signal types, ranging from femtoamp-level DC leakage currents and digital AC >100 MHz to RF s-parameters at 10-40 GHz.
Different fab use cases — for example, a new process ramp, a new fab ramp or a mature process — will dictate the most appropriate way to implement a particular adaptive test strategy. However, the decision path follows these general steps:
Decide why it would be advantageous to change the testing strategy:
- Because results are good and decreasing testing could increase throughput?
- Because results are bad and increasing testing would provide more information to identify problems?
- Because initial results, in combination with incremental testing, indicate that a zone within a wafer should not receive functional testing or functional stress testing?
Quantify what conditions trigger an adaptive test. Decide what percentage of super-critical or critical parameters must cross which preset control limits.
Decide how testing should be changed:
- More or fewer tests, more or fewer sites or more or fewer wafers?
- Modification of test conditions at the DUT, site or wafer level?
- Decide what to do with the data obtained from the new testing:
- Replace or retain previous data?
- Replace all data or just failed data?
- Generate a report or communicate with the automation host?
Mature process — automated first-level process diagnostics. In one case, a mixed-signal production fab normally measured nine sites per wafer on all wafers. Two classes of parameters were measured on seven sites: wafer acceptance specifications (WAS) and reliability parameters (RELs). On the other two sites, in addition to WAS and RELs, monitoring parameters with longer test times were measured. If just one of the approximately 10 RELs measured at each of the nine sites failed (one value out of spec of the 90 measured), the operator would manually initiate split lot tests on the failed wafers and reprobe them to measure RELs on 34 additional sites (RELs at 43 sites total). An engineer would later look at the REL maps and decide whether the lot should be passed or scrapped. This manual reprobe procedure required four human intervention points, took from several hours to several shifts for disposition, was operationally cumbersome, and wasted engineering review time because data from two different files had to be located, merged and analyzed.
The automated adaptive test implementation of this scenario would be: "Perform fewer tests, on more sites, with the same number of wafers" if one critical parameter fails on one of the nine primary sites. Figure 1 illustrates typical wafer results from the automated process. Measuring more sites provided a clear signature of a zonal within-wafer non-uniformity that is characteristic of a process problem. No operator or engineer intervention was needed to obtain first-level process diagnostics, so failure analysis could begin with the information already in hand. This automated reprobe procedure required just one human intervention point (engineering review), took only 10 minutes of cycle time for disposition, was operationally simple with no need for the operator to unload and reload wafers, and saved engineering review time because all probe (process control) and reprobe (process diagnostics) data was in one file for easier engineering review for lot disposition.
Furthermore, with adaptive test information, the wafer could be partially scrapped or recovered; without it, the entire wafer would have to be scrapped. By increasing the overall wafer test capacity of its test cell, the fab achieved a full return on investment (ROI) in less than six months, recouping its acquisition and implementation costs.
The software architecture's flexibility made possible additional refinements to this automated procedure. Parametric test is now performed at different points in the process — typically in production after Metal 1 (M1), at M3 or M4, and at end of line — and to service engineering work requests. Different parameters and control limits are used at each point. The adaptive test capability is robust enough that the automated decision process could be described and implemented in general terms and remain fully functional, even if only a subset of all the parameters were tested. This made it possible for a single decision process to be implemented, version controlled, and applied to all the various test points and test fragments used in the fab.
Mature process — verify previously measured good site. Traditional parametric test measures properties of the basic "building block" devices of a circuit: resistors, capacitors, transistors, inductors, etc. Increasingly, parametric test is being employed to measure "benchmark circuits," macro collections of the basic devices used to monitor the overall circuit performance. One example of measuring benchmark circuits is using a ring oscillator to determine the gate delay of the basic transistor. Another is monitoring RF circuit blocks like filters to measure insertion loss and roll-off points.
Whereas traditional parametric test uses a sparse sampling strategy (typically nine locations per 300 mm wafer), all circuit blocks — up to 500 — may be measured on a wafer when monitoring benchmark circuits. The CuO that collects on probes as they scrub the pads may produce erroneous results. In this case, the goal of an adaptive test is to automatically isolate calibration drift or probing problems from process problems when a site fails. A probing fault can be cleared through a sequence of cleaning the probe tips, measuring an adjacent site and, if necessary, remeasuring the previously measured good site. If the measured data fails limits (Fig. 2 ):
- Clean probe, and retest at an adjacent site. If the adjacent site passes, mark the initial site Bad and continue.
- If the adjacent site fails, reclean and retest the previously measured Good site. If that previously measured Good site passes, mark the initial site Bad and continue.
- If the previously measured Good site fails, stop testing, reload the calibration wafer and recalibrate.
In other words, if a site fails and then an adjacent site or previously Passed site passes, then mark the site Bad and proceed. If an adjacent site and a previously Passed site fail, then stop testing and check the tool. This methodology maintains high data integrity at highest die throughput, as required by the low-average selling price ICs being measured.
Implementation considerationsWhen a test system has a robust and flexible software and hardware architecture for implementing adaptive testing strategies, it may initially be tempting to create complex and highly nested decision trees. While they may be useful, constructing and implementing them typically requires significant effort and time, which delays payback. In the authors' experience, many fabs (particularly those running mature processes) have a routinely performed, often undocumented, manual reprobe operation. Talking with operations personnel to identify these operations and then automating them with adaptive test provides a straightforward approach that allows for faster implementation and payback and makes it possible to institute best practices before adopting more complicated adaptive test strategies.
By definition, adaptive testing creates data sets of various sizes at the die, wafer and lot levels. To prepare for adaptive testing, fabs must decide how to manage the various amounts of data when inputting key parametric test data to their yield management databases. The appropriate course of action typically depends on how often adaptive tests are triggered and how much more (or less) data is generated. One method is to define the largest dataset, then populate the yield database with sparse, partially populated datasets as necessary. If database bloat is a concern, another method could be to divert data from an automated process diagnostics adaptive test into a special engineering database for offline review.
Adaptive testing delivers benefits only if it is integrated with a comprehensive operational model that includes electrically verified probe-to-pad contact and probe tip auto-cleaning. Simply put, a primary parameter measured out of control because of improper probe-to-pad contact will erroneously trigger an adaptive test branch, acquiring irrelevant data and wasting valuable wafer test time. Four basic techniques are critical to implementing adaptive test successfully by ensuring higher-integrity results and avoiding the acquisition of meaningless data (Fig. 3 ):
- Proactive probe card management of smart probe cards that includes on-board touchdown and quality metrics, so the testing does not start on a wafer lot if the tester is using a probe card that is at or near its end of life.
- Verification of probe-to-pad contact on continuity/short structures on wafer or on the shorting block chuck of the prober. Predetermined levels of resistance, conductance or capacitance must be achieved on the structures before a wafer is measured. If the level is not achieved, it triggers an automated probe tip clean sequence.
- Verifying data integrity by retesting a parameter. For example, anomalous readings will trigger a chuck up/down to clear contact problems or device oscillations, eliminating unnecessary adaptive testing.
- Incorporating the decision criteria for changing test strategy into a complete recipe management program to allow automatic production fanout, version control and ISO 9001 traceability.
Automated adaptive test is a production-proven capability that adds value to parametric electrical test within the fab. ROI can usually be achieved in six months or less, typically first by automating manual reprobes already being performed, and then by extending the strategy to include more complicated decision criteria. It is applicable to a wide variety of fab operating environments.
Future work for mature processes may include adaptively testing all die on wafer if certain critical parameters fail, for known good die situations or as a pre-screen for functional test. For new processes, as fabs ramp their device yields and learning, adaptive testing could be used to trim the number of parameters tested in process integration more intelligently. For yield crashes during volume production, adaptive testing can simplify reverting to the original full test suite for diagnostics and allow comparison with results obtained during the original process ramp.
| Author Information |
| Bernd Bischoff is the group manager of the parametric test and probe sustaining group of the Freising Wafer Fab of Texas Instruments . He has a physics diploma from the Munich University of Applied Sciences. In addition to parametric test, Bischoff is responsible for functional test with mixed-signal testers. E-mail: b-bischoff@ti.com |
| Uwe Schiessl is a characterization engineer in the ETEST group of Freising Wafer Fab of Texas Instruments. He has a physics diploma from the University of Heidelberg. His current focus is electrical test with the Keithley S600 Series and mixed-signal functional testers. E-mail: u-schiessl@ti.com |
| Manfred Brenner is a lead applications engineer with Keithley Instruments . He supports Keithley parametric test systems located throughout Europe. E-mail: mbrenner@keithley.com |
| Steven Weinzierl is a product marketer in the business development group at Keithley Instruments. He received his Ph.D. in 1992 from Cornell University. E-mail: sweinzierl@keithley.com |
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| Acknowledgements | ||
| The authors thank Robert Bell and Carl Scharrer of Keithley Instruments for their contributions to this article. | ||


