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AC Coupling Addresses Connection Density and Integrity Issues

John Baliga, Contributing Editor -- Semiconductor International, 7/1/2004

AC-coupled transmission is an established data communication method, of which Ethernet is a prime example. Researchers at North Carolina State University (Raleigh, N.C.) and Sun Microsystems (Santa Clara, Calif.) are among those examining AC-coupled interconnection for chip-to-package and chip-to-chip communication. The advantage is that contacts need only be aligned to make the connections. Direct connection using solder, wire or other material would only be necessary for the DC power and ground connections.

For the upcoming connection densities and pad pitches called for in the 2003 International Technology Roadmap for Semiconductors (ITRS), alignment alone will certainly be quite a challenge, not to mention the need to make good conductive connections for each contact. For AC-coupled contacts, alignment would be the only challenge.

Of course, this is also the advantage for using anisotropically conductive films (ACFs); alignment is all that is needed. The difference is that ACFs provide a conductive contact. If the film delaminates, the connection is broken. This is not so for AC-coupled interconnections.

Another advantage for AC-coupled interconnects is built-in passive equalization. They act as differentiators and high-pass filters. Communication is actually done in pulse mode, with an extended useful bandwidth. With appropriate choices for send and receive circuitry, the bit-error rate can be very low.

The challenge for using AC-coupled interconnects is that conductive contacts must be used for the DC connections to the same chip. The bumps for the DC connections must be large enough to be reliable, and the signal contacts must be within a few microns of each other.

Professor Paul Franzon's group at North Carolina State is developing a buried-bump approach to combine DC and AC-coupled connections for the same chip (Figure ). Trenches are made in the package substrate, and landing pads are made on the base of those trenches, using standard manufacturing practices.

This buried-bump packaging scheme provides conductive contacts for power and ground connections, while providing the proper spacing for the AC-coupled signal contacts.

They used MCNC's (Research Triangle Park, N.C.) plated bumping process, which is available commercially from Unitive Inc., to make the bumps. They chose this process to control the bump size with enough precision to adequately control the chip-to-package spacing. The group has demonstrated a chip-to-package spacing of 2 µm using this approach.

According to the group, these AC-coupled signal contacts can be made small enough to fit thousands of contacts per square centimeter in the area not used by the bumps in a standard 250 µm pitch bump array. The solder bumps now used for both signal and DC connections on a leading-edge IC could become dedicated DC connections, while thousands of AC-coupled contacts are added for handling signals.

Robert Drost of Sun Microsystems's Research Laboratories presented the use of this approach in a three-dimensional packaging scheme at the 3D Architectures for Semiconductor Integration and Packaging Conference in April. The motivation for using what he calls proximity communication is to make systems in which the individual chips are easily replaceable.

There are well-known advantages to using smaller die in a system: higher die yield and increased testability. Reworking is a concern when building multichip systems, especially if the chips are connected directly to each other. However, if most of the electrical connections do not involve actual physical connection, then rework can be easier. The ability to rework multichip systems with little effort can enhance system yield and manufacturing efficiency. This can be a great help when using a leading-edge approach such as high-density 3-D packaging.

Drost's presentation focused on the challenges associated with alignment, which can be significant when the main alignment task is to align chips to each other instead of aligning chips to a package substrate.

For DC contacts, Drost proposed the use of spring-type contacts, such as those made by FormFactor (Livermore, Calif.) or NanoNexus (San Jose), instead of a permanent contact-like solder. With spring-type DC contacts, and no solder or underfill materials, the replacement of bad die could be simplified even more. Spacing between AC-coupled signal contacts would be determined by the thickness of a passivation coating over those contacts.

Both of these examples illustrate how the use of AC-coupled interconnects can simplify upcoming packaging processes to the point of making them practically possible to manufacture.

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