The Next Wafer Diameter Change

Having just introduced the 300 mm wafer, one might think it is too soon for the industry to be thinking about the next wafer diameter change. However, timely planning for the inevitable usually provides for efficiency.
 
Unlike process innovations, the choice of maximum wafer diameter and its availability or timing have a disproportionate impact on the wafer manufacturers and equipment suppliers that occurs well in advance of receiving any related revenue.

In the mid-1990s, 300 mm wafers were forecast to be in production as early as 1997. Substantial investments were made to meet this and other forecasts (Figure ). However, significant 300 mm device production did not begin until 2001-2003. New wafer eras usually have a slow start, but the optimistic expectations for 300 mm were not met.

Larger wafers improve economies of scale for larger chip sizes. In earlier forecasts, chip sizes as large as 47 mm on a side were projected as early as 2014, and 450 mm wafers were projected to be in production as early as 2008 ("unofficial" 1998 ITRS). Table 1 notes recent ITRS projections^1-3 calling for a 450 mm wafer between 2011 and 2016.

Extrapolation of past and current trends leads to 450 mm process equipment introduction in 2014 and device production in 2022.

Applied Materials CEO Michael Splinter recently called for realistic (and stable) roadmaps so that the industry can plan and implement efficiently.⁴ Two important decisions for the industry involve identifying the next wafer diameter and projecting when it will be in production. The proposed move to 450 mm has not been widely discussed.

This article, which is derived from an ongoing SEMI seminar,⁵ deals with silicon wafer diameters from 1960 to 2030.

As shown in the Figure , the diameter of the largest silicon wafer in significant device production has increased linearly at about 7.5 mm/year since the 1960s in a sequence of diameters: ≤10, 12.5, 22, 25, 31.25, 50, 56.25, 75, 81.25, 100, 125, 150, 200 and 300 mm.^6-9

Wafers <100 mm were denominated in inches before the industry standardized on the millimeter denomination. In the early 1960s, wafers were typically processed in batch processors, which generally permitted some compromise in equipment productivity and economies of standardization in order to gain more, larger die on each wafer for some device manufacturers. For wafers 150 mm and larger, each new wafer diameter was driven by one pioneering device manufacturer, and generally required substantially new equipment design.

In this article, the term "first year of significant device production" means the first year when enough wafers were in production to register significantly on published market summary charts. As such, the "year of significant production," which is a better measure of market penetration, occurs somewhat after the ITRS year of initial production.

Commercially significant silicon device production began in 1961. Wafer processing equipment was developed within about a year as demonstrated by the trend line for the "year of initial processing equipment development." (Here, "processing" is italicized to make clear the distinction between wafer processing equipment and wafer manufacturing equipment.) The "year of initial processing equipment development" does not include prototype and feasibility studies, and does not include wafer manufacturing equipment. It is the year in which most final process equipment configurations were initiated. The initial equipment development line in the Figure is based on personal experience and informal reviews.

In the 1960s, several silicon device manufacturers were vertically integrated. Companies such as Fairchild Semiconductor and Texas Instruments developed their own wafer-making and wafer-processing equipment, as well as some of their own materials. By the late 1960s, a significant and separate semiconductor equipment and materials industry was developing, which led to the formation of Semiconductor Equipment and Materials International (SEMI) in 1970.

The trend line for the year in which process equipment is initiated (Figure ) increases linearly at about 8.7 mm/year, which increases the time delay between initiation of equipment development and significant silicon device production.

The time delay between initial wafer processing equipment development and first significant device production increased from about one year in the 1960s to one to two years in the 1970s, and about three years in the 1980s. In the 1990s, when 300 mm process equipment development was initiated, this delay was about six years (1995/96 to 2001/02). If this historic trend continues as noted in the Figure , a nominally 450 mm wafer will have a delay of about seven to eight years.

Development of wafer manufacturing equipment generally precedes that of wafer processing equipment, and the increasing delay between initial equipment development (process or wafer-making) places an increasing financial burden on equipment and wafer manufacturers to carry the cost of development until such equipment and wafers are purchased in quantity.

300 mm wafers went into significant device production around 2001. The initial ramp was slow because of limited demand. However, increased production definitely took place in 2003. Device production on 200 mm wafers will continue to be dominant for several years.^6-9 If the projection in the Figure is correct, the 300 mm era could last about 20 years (2001-2021) before a new diameter era is introduced. If the 2003 ITRS perspective article³ is correct, the new diameter era could begin before 2015 (Table 1). The Figure also contains a possible linear projection of ITRS "first year of production" for 150 mm in 1982, 200 mm in 1987, 300 mm in 1998, and 450 mm in 2016. This possible ITRS projection occurs at an accelerated pace compared with historical data.

The questions are: What should the new diameter be? and When is the optimum time to change?

Table 1 lists some possible schedules for the next wafer diameter change. If the historical trend is followed, a new wafer ~450 mm in diameter will be in significant production by 2021 or soon thereafter. As noted in Table 1 , the 2001 ITRS, 2003 ITRS, and 2004 perspective on the ITRS show progressively earlier adoption of a 450 mm wafer.

If wafer manufacturers and process equipment suppliers are willing to accelerate the historic projection of wafer diameter increases, and if device manufacturers are willing to build 450 mm fabs before 2020, then the historical trend in the Figure could be accelerated.

For an efficient diameter conversion, it is important that the industry decide on a single, next diameter wafer before about 2010, and implement the development and required standards on an appropriate schedule.

When the ITRS (and its predecessors) were forecasting >40 mm chips before 2020, a move to 450 mm did not seem appropriate because it would not permit enough chips per wafer. Now that the 2001 and 2003 editions of the ITRS have provided more conservative chip size forecasts, it seems likely that the largest chip size will not exceed 20 × 20 mm before 2018 (2003 ITRS: microprocessors; 310 mm² chip area; 17.6 mm on a side, if square, not including the dicing street; from 2003 to 2018). DRAM chips are not forecast to exceed 25 × 25 mm before 2040 (linear projection of 2003 ITRS DRAM chip size data). If such forecasts are not correct, then the time to change these chip size forecasts and next wafer diameter forecast is well before 2010. According to the historical projection (Figure ), the wafer diameter after the next one will be used until perhaps a 600 mm wafer in about 2040.

Wafer diameter is driven by chip size. Table 2 lists various square arrays of square chips (including the dicing street width) that can be accommodated by various wafer diameters assuming a 2 mm edge exclusion and rounding up to the next 5 mm increment. Depending on the desired size of the square array, two ranges of wafer diameters are favored: 440-465 mm and 480-515 mm.

Efficient layout of real die is more complex than this simple analysis indicates. Many considerations must be included in deciding the next wafer diameter, and that decision will have a very big impact on the industry.

The 450 mm wafer in the 2003 ITRS may be the optimum diameter; however, the simple analysis in Table 2 indicates that 460-465 mm or possibly 510-515 mm might be a better choice. If the chip size remains <25 × 25 mm through 2040, then the optimum diameter may be in the 440-465 mm range.

There is no magic to a wafer diameter of X00 or X50 mm. A 12 × 12 array of 18 mm² chips requires a nominally 310 mm diameter wafer. In retrospect, if the industry had selected a 310 or 315 mm wafer in the mid-1990s, there would be less pressure in the near future to increase the diameter. By making sure of the optimum diameter and schedule before 2010, the industry can benefit later from a more efficient choice now.

If the 2003 ITRS projection of <18 × 18 mm chips for microprocessors and <20 × 20 mm for DRAM through 2018 is correct, accelerating the next wafer diameter change may not be necessary. The 300 mm ramp is reported to be more rapid than the 200 mm ramp,¹⁰ and if that trend continues, the overall economic benefit of not rushing to the next wafer diameter may outweigh the larger wafer benefit.

Only a portion of the industry benefits from a diameter change. When the industry initiated the change to 300 mm, the 150 mm wafer was obsolete for many devices. The next wafer diameter change is inevitable as long as it is technically possible and economically feasible. If the doubling period of Moore's Law¹¹ is increasing because of technical and economic reasons as well as questions about the market size for the most advanced devices, accelerating the change in wafer diameter without more discussion about what that diameter should be may not be the most economical decision for the industry.

Many considerations must be taken into account for such a technially complex and financially significant decision. This article outlines some factors that tend to favor delaying the time of initiating the next wafer diameter and planning for the largest diameter wafer deemed possible at the time it is required. These factors are:

• A 460-465 mm wafer (with process equipment initiated in ~2015, first year of production ~2019, and significant device production in ~2021/22) seems optimum for square die arrays >25 mm on a side (including the street).
• A 480-515 mm wafer provides more usable area and permits more die >25 mm on a side. However, it offers more technical and economic challenges.
• The time for doubling the complexity of the most advanced devices needed by the end users seems to be increasing from its historic 18-24 month period.¹¹
• Delaying the next diameter change and targeting a somewhat larger diameter provides more time to amortize the investment already made in 300 mm capability.
• The 300 mm transition demonstrated that standardization, planning and cooperation can minimize the difficulties associated with a wafer diameter change. Now (2004-2010) is the time to have a vigorous discussion about the next wafer diameter and when must it be implemented.