Inside the Physics of Dielectric Films

The race for higher-performance microelectronics has driven a need to find materials that can answer the challenges faced by this rapidly advancing technology. As clock speeds increase and feature sizes decrease, the need for lower dielectric constant (k) materials becomes paramount. Many new materials present challenges in their respective mechanical properties that have to be addressed in electrical characterization methods.
 
When conductors are placed next to each other or on top of one another (separated by an insulator), an intrinsic capacitor is formed. Fundamentally, this capacitor becomes part of the original circuit, whether the designers accounted for it or not. From physics, we know that capacitors take time to charge. In the case of high-speed electronics found in microprocessors, digital signal processors (DSPs) and associated ICs, these intrinsic capacitances slow signal swings (due to the charging time) and thus the overall speed capability of the circuits.

For a given circuit geometry, the properties of the insulator are therefore the variables that can lower the intrinsic capacitance. From the inception of the IC, this insulator has been SiO₂, which provided the great advantage of being easily "grown" on silicon, a mainstay of the planar process. However, due to the limitations of the dielectric properties of SiO₂, the IC roadmap, known as Moore's Law,² cannot be sustained without finding new insulators.

Dielectric constant is the key parameter involved in quantifying the intrinsic capacitance between conductors in known geometries, but not the only one. In time-varying electric fields, dielectric loss measured by the loss tangent is also considered. Properties that quantify the dielectric strength and DC leakage in insulators can also be important.

Determination of dielectric properties associated with capacity and loss are accomplished indirectly by a capacitance measurement. It is therefore important to understand the physical nature of this capacitance measurement to discern the separate dielectric properties.

When a perfect insulating material is placed in an electric field, a displacement current will be generated (in an imperfect insulator, an additional conduction current appears). Permittivity (ε) is defined as the ratio of the electrical displacement D in coulombs per square meter (C/m²), to the electric field E (V/m). The units for this ratio³ simplify to farads per meter (F/m).

Equation 1

If an electric field is generated with no insulating material present (in a vacuum), the permittivity of this scenario is defined as the permittivity of free space:⁴

ε ₀ = 8.8542 × 10^-12 F/m

The ratio of the permittivity of the insulating material (dielectric) to that of free space is known as the relative dielectric constant ε _r.

Equation 2

Measuring the dielectric constant (k or ε _r) of a material requires building a test structure for the dielectric of interest. Many possibilities exist for creating these structures, including ones that mimic the target application of the material. For interlevel dielectrics (ILDs), a stacked structure may suffice. More complicated structures can be used to ascertain the dielectric constant in-plane with the semiconductor, such as inter-digitated serpentine/combs.⁵ This may be necessary to more closely study electronic effects related to capacitive coupling (crosstalk, etc.).

Disadvantages to the serpentine/comb structure come in the form of fabrication. Photolithography is required, which is not an expedient process. For the low-k materials supplier developing new dielectrics, a faster method is necessary to measure electrical properties.

A simple stacked parallel plate capacitor approach is a quick and reliable method for measuring dielectric properties of thin films. This type of structure can also be used to evaluate dielectric strength, dielectric leakage and metal ion diffusion.

Capacitance is measured on a thin-film dielectric using a parallel plate capacitor stack (Fig. 1 ). A metal insulator semiconductor (MIS) topology is created, starting with a silicon wafer as substrate, which forms one of the parallel plates of the capacitor structure. The insulating dielectric is then grown or spin-coated on the silicon wafer. The other parallel plate is formed by sputtering either aluminum or copper to form a circular metal gate, or dot. A mercury probe can also be used to create a metal gate on top of the dielectric.⁶ However, for the ability to use the sample for other types of electrical characterization, the more permanent PVD method is preferred.

1. The sputtered metal dots and silicon substrate comprise the capacitor’s parallel plates. Accurate measurement of the dielectric constant of the insulator depends on accurate capacitance measurements by the probe and knowledge of the insulator(s) thickness.

Once the sample is prepared, it is placed in an apparatus that makes electrical contact with the wafer substrate (usually a sample stage). The force of vacuum holds down the sample and creates a solid electrical contact, while the gate is probed manually for the measurement.

The capacitance of a parallel plate capacitor is:

Equation 3

Solving for dielectric constant:

Equation 4

Measurement of the dielectric constant depends not only on an accurate measurement of the capacitance of the parallel plate stack, but also the accuracy of the thickness of the dielectric film and the area of the parallel plates. Nonuniformities in dielectric thickness and uncertainties of the top electrode surface area (plate) introduce errors in reported ε_r.

Impedance measurement is accomplished using an AC voltage, primarily at 1 MHz, although other frequencies can be used. It is important to note that this impedance is highly capacitive in nature, but should nonetheless be treated as more than just a capacitor. Models of this impedance range from series RC and parallel RC to others, which are beyond the scope of this discussion.⁷

Unlike DC stimulation, the application of an AC field to the dielectric introduces losses due to molecular motion and relaxation. The molecules align themselves with the electric field, and as the electric field changes polarity, so does the alignment of these molecules. In the case of an AC field, the permittivity of the dielectric can be described as a complex number, which incorporates these dielectric losses.

Equation 5

This complex permittivity consists of the real part (ε'), which is due to AC capacitance, and the imaginary part (ε"), which is dielectric absorption. A common expression for losses in a capacitor is known as loss tangent (sometimes referred to as loss angle or dissipation factor), which is calculated as:

Equation 6

This should not be confused with loss factor, which is the loss tangent multiplied by the dielectric constant.

Equation 7

The loss tangent of an ideal capacitor is zero. In practical capacitors, the loss tangent should be minimized, but can vary with applied frequency.

The dielectric constant of insulators generally decreases with increasing frequency.³ This is due to the inability of the molecules to align themselves fast enough with the electric field at high frequency. Figure 2 shows the relationship between dielectric constant (ε_r) and loss tangent tand as a function of frequency for a 50 nm silicon carbide (SiC:H) film that was subjected to a range of AC frequencies using a dielectric spectrometer.

2. Dielectric constant generally decreases with increasing frequency. The loss tangent refers to the capacitance losses of a capacitor due to dielectric absorption.

Dielectric constant of stacked films may be required for various reasons (for instance, when used as a model for porous films). In a two-layer dielectric stack, the dielectric constant of one of the two films has a known value. Thermally grown SiO₂ is a typical stacked dielectric material because it is well documented and researched, with a dielectric constant of 3.9.⁸

3. A typical stack used to measure capacitances and dielectric constant.

4. Measurement of this dielectric stack can treat each dielectric for the capacitance it represents individually and as a single capacitor.

However, other established dielectric materials can also serve in this role. Figure 3 shows a dielectric stack, which can be analyzed as two capacitors in series, C₁ and C₂, representing dielectric 1 and dielectric 2, respectively. The metal and silicon substrate constitute the parallel end plates of the capacitor. Note that the schematically represented intermediary metal plate does not exist in the dielectric stack, but is shown in the schematic of Figure 4 . In this way, we can treat each dielectric for the capacitance it represents individually (C₁ and C₂) as a single capacitor (C_T).

The aggregate capacitance measurement represents the total capacitance of C₁ and C₂ combined. Circuit analysis of the series capacitance yields a total capacitance of: ⁹

Equation 8

Substituting Equation 3 in Equation 8 , it can be inferred:

Equation 9

Solving for ε₂:

Equation 10

Measurement of the MIS capacitor can be done using several different methods. If the substrate silicon wafer has resistivity in the range of 5-20 Ω-cm, then the capacitance-voltage (CV) curve method can be used to measure capacitance.¹⁰ The four-point probe method, which couples a constant current source with a volt meter and a special probe, confirms the resistivity of the silicon wafer.¹¹

The CV method requires sweeping the substrate silicon from depletion to accumulation, which takes more time than a single-point bias measurement. Though the CV method can yield accumulation capacitance, it is more often used to study the effects of ionic contamination.¹²

Substrates that have very low resistivity (<0.05 Ω-cm) require little or no DC bias to exhibit accumulation. This is due to the large amounts of available free carriers (either holes or electrons for p-type and n-type substrates, respectively). The very low-resistivity wafers can be used to allow a single-point bias measurement of capacitance. A variety of capacitance or impedance measurement devices can be used to take this measurement.⁶

We conducted impedance measurements using a Keithley 590 CV Analyzer, and Hewlett Packard HP-4194A impedance/gain phase analyzer, which were connected to a Signatone 6 in. wafer sample stage. We used a Novocontrol BDS-80 broadband dielectric spectrometer for variable-frequency measurements. The spectrometer incorporates a test fixture that was used throughout this study.

The single-point bias measurement is accomplished by placing the MIS sample on an apparatus that provides vacuum to hold the sample down, and a probe that contacts the metal top plate to complete the circuit (Fig. 5 ).

5. The probe contacts electrode dots of differing size (0.6 mm to 3.0 mm) to take a series of single point bias measurements.

A series of single-point bias measurements with different top plate areas can be used to create a graph that plots capacitance vs. electrode area. The C/A term of Equation 4 is the slope of the graphed line. Therefore, the dielectric constant can be calculated by applying a linear regression line fit technique to these points, extracting the slope, and using Equation 4 . The overall sample size in Figure 5 is 3 cm², with dot sizes ranging from 0.6 to 3.0 mm.

Most of the sensitive capacitance instruments have a full-scale capability of ~2000 pF. Therefore, the choice of diameter size is governed by the thickness and dielectric constant of the material. Thin materials generally require the use of the smaller dots, since the plates of the stacked MIS capacitor are closer together and exhibit larger capacitances than similar thicker films. The use of smaller dots with thicker materials can lead to poorer results due to the signal-to-noise issues of the measuring apparatus and instrumentation. The goal in measuring these structures is to maximize the amount of signal, without exceeding the measurement range of the equipment.

Porous films that stretch the boundaries of low-k materials present the challenge of reliably creating a top metal gate. During the process of PVD sputtering, atoms of the top metal (such as aluminum) bombard the surface of the film. Porous films may allow the metal to penetrate the film and short the capacitor stack. To mitigate this short circuit, a second dielectric layer is deposited over the porous layer to act as a cap. PVD is then deposited, which in effect creates a second capacitor, as depicted in Figure 4 .

To predict the measured dielectric constant of the stack, a slight change in formulation is necessary. In the case of this study, both dielectric constants of the insulators in the stack are known, but the overall dielectric constant that will be measured by the instrumentation is not known. Therefore, to predict this value, the overall C_T is a variation in Equation 3 :

Equation 11

where ε_T is the reported dielectric constant by the instrumentation, representing both dielectrics, and t _T is the total thickness of both dielectrics. Substituting Equation 11 into Equation 10 for C_T, it follows:

Equation 12

Simplifying Equation 12 and solving for ε_T:

Equation 13

The measured sample consisted of 100 nm of thermal oxide (ε_r=3.9), with a second dielectric consisting of 420 nm of FOx spin-on dielectric (ε=3.0). Using these values in Equation 13 results in a predicted k of 3.139. Figure 6 shows a linear regression of five MIS capacitors that were measured using this stacked film.

6. The slope of this line provides the capacitance per unit electrode area. Combined with Equation 11 , the dielectric constant can be calculated.

Using the slope of the line in Figure 6 (capacitance per unit area electrode) in Equation 11 allows the calculation of ε_T of the stacked film. The reported dielectric constant (ε_T) from the instrumentation was 3.145, a variation of less than 0.2% in respect to the theoretical value.

We characterized the dielectric properties of thin-film materials using a capacitive stack approach. Dielectric constant and loss tangent measurements were taken using a stacked MIS topology for single bias and frequency as well as a frequency sweep analysis.

Multiple dielectric films were also measured and compared with theoretical predictions. Measurement of dielectric constant vs. frequency followed the generalized model of inverse proportionality to frequency. For dual insulator dielectrics, the measured dielectric constant closely matched the modeled value.