Smaller CDs Redefine Metrology

CD metrology is becoming an interactive player within the process flow — in lithography, at the track level, on the clean level, and on the etch level. Everywhere there is an exponential interaction increase in CD metrology, compared with previously. Integrated metrology (IM) continues to acquire importance, and much planning must be devoted to what to measure, how to use the data, and what to influence.
 
"There are three CD metrology methods: CD-SEM, electrical and optical measurements," said Dragan Podlesnik, general manager of the Conductor Etch Division at Applied Materials (Santa Clara, Calif.). "Optical is the fastest and electrical the slowest. In the PDC group, we have e-beam metrology (SEM). Other groups are implementing optical CD metrology in a variety of platforms and, on electrical, we're developing electrical measurement procedures."

"The development to consider with CD measurement is an increasing trend of pattern-limited yield loss," said Brian Trafas, vice president for group marketing, patterning solution group at KLA-Tencor (San Jose). "CD-limited yield is traditionally the largest component, but now we must control CD all the way down to the intrafield level — a new challenge for APC. Profile, shape, roughness and interaction with overlay have become yield-limiters. Profile error propagates into etch, creating scrap or yield loss. When considering the design of next-generation CD tools, small feature sizes drive total precision to <1 nm. Feature shape is critical to device performance, requiring 3-D capabilities."

"Life is getting tougher for semiconductor technology," said Anantha Sethuraman, vice president, product marketing at FEI (Hillsboro, Ore.). "High aspect ratios are increasing — deep-trench structures are reaching a 3:1 aspect ratio. The CD is no longer the lateral, 2-D measurement between two adjacent structures or two edges of a structure. With existing technology and crafty algorithms, people are trying to generate a 3-D visual representation from two-dimensional metrology tools like a CD-SEM or even scatterometers. With high-aspect-ratio vias, the CD-SEM has limitations. One cannot see to the via bottom and ensure that it provides what is needed."

"The CD-SEM looks down at structures, and you select a CD," said Applied's Podlesnik. "The measurement extracts one number such as width, line or hole dimension. Going forward, we need to extract profiles maybe at a critical structure's top or bottom. Line roughness is another requirement — micro-CD control."

Roughness is being addressed optically, with SEMs and even AFMs. "We'd like to develop similar ways to measure line roughness electrically," Podlesnik said. "New software developments increase sophistication in SEM data analysis and modeling, extracting additional information. This is one significant factor behind optical CD metrology's strong comeback. The resolution can be higher than e-beam's, and everything depends on the analysis of reflected light, recovering information that before wasn't analyzed."

In contention is where, how and what to measure. Can one measure on real structures on a chip? "We began with test structures, such as CD-SEM bars, diffraction gratings for optical," Podlesnik said. "We're increasingly measuring on product structures. Our goal is to go to a DRAM chip and, without test structures, shine a diagnostics beam on the array and use the return signal to extract the necessary information." When measuring gate lines, there may be a 2000-3000 Å thick line. "With regular structures, if you selected the correct beam, it might penetrate through features, providing information on complex 3-D structures."

Going from lines to holes relying on optical techniques is challenging. Matters are far more complex when dealing with chip contact holes or any top-down view; some periodic structures are not continuous lines, resembling chevrons.

"We see two measurement modes emerging," Podlesnik said. "For universal test structures, for example, 50 × 50 µm gratings in scribe lines, the data can be had without the need for libraries. Actual product structure metrology requires a more sophisticated approach. If a user wants a particular structure, then a library may be necessary. Currently, typical line roughness is between 5 to 10 nm. With a 20 nm line, this is considerably less. Small-structure metrology will be hellish."

For Micha Rosenzweig, director of CD-SEM products at Applied, the question is how low a CD-SEM can go. "The 60 nm node is in R&D, with some looking at 45 nm," he said. "Will it work at 45 nm and below? Using current-generation tools, we've measured wafers that were directly printed to achieve features such as contact holes in the neighborhood of 35 nm and lines at 20 nm. CD-SEMs can go below the 45 nm node."

Applied, like others, is doing simulations to learn more about beam and specimen interaction at ultralow CDs, which is dependent on spot size. The limit appears to be <15 nm, where sensitivity to CD changes stops being linear. "All CD-SEMs have a bias as it relates to the true CD," Rosenzweig said. "However, as long as you measure the same thing repeatedly with the same bias, then the measurement just reports variations." When CDs go to <15 nm for gate, a different bias with a different CD results. "This'll require algorithm innovations, to detect bias changes."

CD-SEM manufacturers struggle to reduce spot size to improve resolution and accuracy. "While the spot size remains smaller than the CD, there are no problems," Rosenzweig said. "However, when the CD is almost as small as the spot size, the physics (and algorithms) change because the waveform from the specimen is different from that from larger features. With smaller CDs, the bias will no longer be constant, but change with CD size. Each generation, we reduce the spot size by 15-20%, but CDs shrink faster. In four or five years, the spot size won't be small enough for the CDs being measured, and we'll need substantial innovation."

KLA's Trafas recalls that, historically, top-down 2-D information was all that was required of the CD-SEM. "Today, there are multiple solutions to provide 3-D profile information. In the CD-SEM area, for example, we use electrostatic beam deflection technology for in-device sidewall angle measurements, and spectroscopic ellipsometry in our optical CD, to perform non-destructive profile measurements. This is important to address the issue of pattern-limited yields. Another CD metrology challenge is to address tool and material interactions as a result of the transition to 193 nm resists and high-k dielectric films. We've developed a flexible scan architecture for CD-SEM to minimize effects of beam/sample interactions."

According to Peter Gise, director of marketing at Nanometrics (Milpitas, Calif.), the question is how far CD-SEMs will go, and at which technology node scatterometry-type measurements will kick in. "There are three major CD areas. The first is mask — a big source of within-die CD variation. The second is litho, with the scanner and the track, each with its own CD variation sources. The third area is etch. All three affect the overall CD budget for a 90 nm (or smaller) generation device." (Fig. 1 )

1. Standalone and integrated metrology for wafer-to-wafer control in a lithography cell is no longer an option, but has become a requirement forced by increasingly diminishing CDs. (Source: Nanometrics)

As 65 nm processes become the target, total allowable CD measurement variation will be ~2 nm. "The mask may have a 7 or 8 nm variation, then there's the litho step — track and scanner — with a ~7 nm variation," Gise said. "Etch has its own uniformity issues, creating another couple of nanometers' variation. We've been working to incorporate scatterometry. If one uses a CD-SEM in these areas, there are throughput issues as well as others about whether you want to use an independent, single-line measurement or get scatterometry's better averaged measurement, a diffraction signature originating from lines and spaces."

Presently, it is unclear whether a reasonable yield can result from 65 nm processes, and if a market capable of supporting the requisite volumes exists. "It's easy to say that you're developing it and will do it, but not many will be doing 65 nm in five years," Gise said. "We see lots of 130 nm stuff, not many 90 nm fabs or devices. As long as there are workarounds, matters will be postponed."

A lack of understanding of how some metrology facets work blocks technologies like scatterometry, keeping it from being accommodated in the industry. "A CD-SEM gives a pretty picture," Gise said. "Put in bars and get a measurement — it's a natural-looking process, although you're looking at a representation of reality. Not so with scatterometry — it's mathematics. You create a mathematical model representing what happens in the wafer. If you want CDs, it's simpler with a CD-SEM. But we're also looking for profile, sidewall angles, bottom CDs, rounding, notching, and the stack thickness itself — eight or more parameters instead of one. Same for film thickness. As films thin, you need spectroscopic ellipsometry combined with reflectometry, resulting in a complex modeling program." Technologies like scatterometry are necessary to get wafer-to-wafer adjustability — either wafer-to-wafer corrections are done, or the process will not be robust and yield will be disappointing.

2. Three-dimensional analysis of features is key to attaining and controlling desirable yields. Pictured here are 50 nm polysilicon gate structures. (Source: FEI)

"We ran a comparison between the top CD-SEM and our structural metrology tool," said FEI's Sethuraman. "It became apparent that, when the SEM measured the lateral dimension, it indicated that the measured feature was within 10% of the actual specification, which is attributable to process variation. However, when we measured the bottom CD after cross-section, the CD-SEM showed the bottom at spec, whereas cross-section showed that in reality the bottom CD was 33% off. The third dimension is the CD measurement required to control the line." (Fig. 2 )

The question is how to do it in production. Methods can be applied such as a specific die location, and cross-section and crack the die and not use it. Structures could be incorporated in the scribe line, to be cross-sectioned and measured. However, this requires a unique correlation between the array and the scribe line, because they process differently due to pattern and areal density differences.

Bents Kidron, director of corporate marketing for Nova Measuring Instruments Ltd. (Rohovoth, Israel), sees 90 nm and beyond process control requirements needing more measurements per wafer to keep processes within spec limits. "To avoid drift or tool excursions, enormous amounts of data must be analyzed almost in real time."

Current SEM-based CD metrology techniques do not meet high-end manufacturing technologies' requirements. Then there is the measurements' destructive nature, tool-to-tool matching needs, and throughput. "Additional information such as the CD's shape and profile, wall angles and etch depth is required," Kidron said. "The capability to use these results, couple them with APC through the use of IM, higher sampling, and reduced cycling time is a major task." Scatterometry meets speed and data requirements for measurements needed for each site.

CD-SEMs are predominantly used for development and process control, although scatterometry's opportunity seems to lie in the process control space, according to Neal Sullivan, vice president of technology for Soluris (Concord, Mass.). "In terms of the integrated side of things, everyone sees the benefit, but the devil's in the details: How do vendors cooperate, how do interfaces work, do you bring expensive process equipment to a halt if your metrology subsystem is down?" Once a process has gone through development, pilot line, characterization, and hits its yield targets, then scatterometry is usable for process control, being carefully matched back to the CD-SEMs that developed and brought up the pilot line.

"When people talk about pilot line development, they still gravitate toward the feature image — the SEM," Sullivan said. "SEM's advantage is that you can move to any feature, get an image and measurement instantly. For scatterometry, you must measure a specific test structure (grating array) and know what you're looking at ahead of time to build the model, and solve the equations to figure out what you're seeing."

Past the 90 and 65 nm nodes, the question is which technology provides the necessary capabilities. Soluris and others have taken CD-SEMs below 20 nm. "The SEM's capability is there, especially as one descends to ultralow voltage," Sullivan said. "The problem is that, with sufficiently small features, the two edges can communicate with each other across the feature. The interaction volume from one edge comes out the other side, influencing signal shape, so that the two edges are not independent. The solution is ultralow voltage, reducing interaction volume, making for a more accurate interpretation of the CD. The SEM can then carry us to the EUV regime."

Dean Dawson, director of marketing at Veeco Instruments (Woodbury, N.Y.), views litho metrology as a major challenge — resist profile measurement. "Current SEM technology has charging and shrinkage problems as well as varying bias over multiple linewidths. The 3-D AFM overcomes these problems and becomes a SEM complementary technique."

Specific linewidths and actual linewidth dimensions must be understood. Many working in advanced litho must understand the full profile — not just top CDs, but also profile undercuts, sidewall roughness on small structures, as well as line edge roughness, an increasing concern. "The AFM can measure those parameters," Dawson said. "Current techniques use cross-section SEM, which requires from a couple of days to a week for results. Cross-sectioning the resist changes it, and manufacturers want to get away from this, particularly at 300 mm, because of the cost."

Multiple CD technology techniques will continue to be optimized to address FEOL and BEOL metrology needs. We will not meet all the requirements for precision in-device, critical profile information with a single technology. Future strategies must involve a combination of technologies.