HfSiON High-k Provides High Mobility, Stable V_t

For more than 10 years, researchers have been searching for a material with a higher dielectric constant that would be suitable replacement for SiO₂ and SiON now used for transistor gate dielectrics. As transistor dimensions get ever smaller, using a higher-k material such as HfO₂ can prevent the dielectric from becoming so thin that leakage currents reach unacceptable levels. HfO₂ is a promising solution, but success has been elusive because of problems with shifting threshold voltages and degraded electron mobility.

According to the new 2003 International Technology Roadmap for Semiconductor (ITRS), higher-k materials may be needed as early as the 70 nm technology generation (2006), mostly for low-power applications where the allowable gate leakage is very low. These materials will be needed in 2007 for high-performance applications, which require very low equivalent oxide thickness (EOT). "To date, no suitable alternative high-k material and interface layer has been identified with the stability, reliability and interface characteristics to serve as a gate dielectric for these applications," the ITRS states.

Last month, Texas Instruments Inc. (TI, Dallas) presented results demonstrating the viability of a new high-k dielectric material at the International Electron Devices Meeting (IEDM). TI researchers say that HfSiON avoids the problems seen with HfO₂, delivering 90% mobility and good threshold voltage stability. "TI believes it has found an effective way of balancing the right material combinations to begin replacing the present SiON layer with a hafnium-based high-k dielectric in the next few technology generations," commented Hans Stork, senior vice president and director of silicon technology development. "We are seeing mobility that is 90% of the SiO₂ universal mobility curve with dramatically lower leakage current without sacrificing reliability or adding significant cost to the CMOS process."

"The industry has been exploring a variety of different materials to address transistor leakage, but Texas Instruments is the first to highlight a material with results," said Dan Hutcheson of VLSI Research (San Jose), in a statement. "By sharing such positive results with the rest of the industry, TI has put HfSiON firmly on the roadmap to be the high-k dielectric of choice."

Ajit Shanware of TI said he believes the main problem with HfO₂ is that it is crystalline. "When it is integrated, it is possible that it can go through structural changes," he said. By comparison, HfSiON is amorphous, as are SiO₂ and SiON. "We started with something we already know — SiON — and then slowly put hafnium in it to increase the dielectric constant and still maintain the amorphous nature." Shanware said reliability tests on HfSiON showed that the material is stable for 10 years.

The Figure shows I_d-V_g data obtained by performing pulsed measurements on NFETs built with HfO₂ and with HfSiON. The pulsed measurement setup involves connecting the drain terminal of the transistor to the load resistor, R_L, and connecting a constant voltage, V_DD, to the other end of the load resistor. The measurement involves applying a pulse of voltage at the gate terminal and measuring voltage across the drain and source. The drain current is then given by (V_DD-V_DS)/R_L. Normalization of the drain current was done at V_DS=0.3 V since the voltage across drain terminal changes as the gate voltage pulse is applied.

Pulsed Id-Vg measurements performed on NFETs made using HfO2 and TiN gates (left) showed that Vt shift increased with an increase in pulse height of 1-3 V. By comparison, NFETs made using HfSiON and polysilicon gates (right) showed minimal effects on Vt due to pulse height.

Although HfSiON shows promise, and could well be the next high-k material of choice, there are still obstacles to overcome, as noted in the 2003 ITRS: "The hafnium-based family of high-k gate dielectrics has been significantly studied during the past several years. Nevertheless, near-term solutions will impose severe restraints on surface preparation, pre- and post-process ambient control, silicon-compatible materials development (e.g., gate electrodes and contacts), and post-processing thermal budgets. Similar problems are anticipated with the DRAM storage capacitor dielectric, anticipated to occur at an earlier technology node."

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