Intel Finds Success in Metal Gate/High-k Dielectric Stack

All metals are not created equal, and Intel researchers have found two — an n-type and p-type — that they say work perfectly with high-k gate dielectrics. This is an important milestone for the industry, which has been searching for an alternative to the traditional silicon dioxide gate dielectric and polysilicon gate electrode used in CMOS transistors. Intel isn't saying exactly what the metals are, but said they used them in conjunction with common high-k dielectrics to produce transistors with excellent characteristics.

The problem with the traditional approach is a simple one: the gate dielectric has gotten so thin that it is only a few atomic layers thick. "We are running out of atoms," said Robert Chau, Intel fellow and head of transistor research at Intel (Santa Clara, Calif.). Super-thin gate dielectrics tend to allow large amounts of tunneling leakage current, which in turn leads to overly high levels of power dissipation and associated heat on the chip.

Switching from SiO₂ to a material with a higher dielectric constant (k), such as HfO₂ or ZrO₂, would help eliminate this problem in that these materials provide a thicker physical thickness. This helps block tunneling leakage currents, yet still provides enough capacitive coupling from the gate to the transistor's channel region to enable high drive currents (I_d).

A wide variety of high-k dielectrics have been investigated, but researchers have had limited success (until now). Chau said that two problems typically occur: 1) High-k dielectrics and polysilicon gates are incompatible because of Fermi-level pinning at the high-k and poly interface, which causes high threshold voltages in transistors; and 2) high-k/poly transistors exhibit severely degraded channel mobility due to the coupling of surface optical phonon modes in high-k to the inversion channel charge carriers.

Researchers have known about the Fermi pinning for some time, and have tried various metals for the gate, but Chau said it was exhaustive research and good science that allowed Intel to come up with two that had the "correct" work function. Figure 1 shows the work function of traditional polysilicon, for p-type and n-type transistors, compared with the metals Intel "discovered" and a slew of other metals commonly used in the semiconductor industry, such as TiN. Note that these other metals don't come close to the ideal work function indicated by the dotted red and blue lines.

1. Intel has engineered n-type and p-type metal electrodes on high-k with the "correct" work functions for NMOS and PMOS on bulk silicon. (Source: Intel)

Because high-k dielectrics are metallic oxides, they tend to have some degree of polarization. "The higher the degree of polarization, the higher the k," Chau said. "The problem is that the more the polarization, the more the optical phonon vibration in this material. The more it vibrates, the more it interferes with the charge transport in the channel and degrades channel mobility."

Again, Intel isn't saying exactly how it addressed this problem, but Chau said it's best to think of the metal as a vibration getter. "If I can find the right metal to absorb this vibration such that it won't bother my channel region anymore — leave my channel alone — I won't have this mobility degradation problem."

"It's easier said than done," Chau added. "You can't use just any metal. You need an n-type electrode for NMOS and p-type electrode for PMOS, in order to get the right work function and therefore the right threshold voltage of the transistor."

2. Electrical characteristics of the high-k/metal gate NMOS transistor, with a gate length of 80 nm, show a record-setting drive current of 1.66 mA/µm, with a low off-state leakage of 37 nA/µm. (Source: Intel)

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