Multichip Packaging Developments

Multichip packages (MCPs) hold high growth potential, according to several high-tech market forecasts, but confusion with multichip module (MCM) technology makes exact forecasting difficult. Regardless of nomenclature, the forecasts offer proof that, by offering high performance in miniaturized spaces, MCPs make an attractive solution for next-generation wireless applications, primarily in mobile phones, but are also likely to become commonplace in various notebook computing applications.

Within the mobile handset market, MCPs should continue to gain favor due to recent memory capability developments and the MCP's inherent ability to allow further miniaturization while providing extra performance and functionality. For example, it's fairly common for the latest mobile phones to house memory devices from different vendors in the same package. Japan, in particular, excels at implementation by pushing MCM/MCP technologies into available substrates through low-cost design and production methods for consumer products.

In many ways, MCPs can be seen as an extension of traditional thick-film hybrids and MCMs, which have been around for some 20+ years. Both hybrids and MCMs employ multiple die and offer better performance through shorter interconnects between die, which lowers inductance and capacitance, reduces cross talk, and lowers power consumption, while consuming less real estate than individually packaged die. However, MCM market penetration has been inhibited by their high assembly cost due to mostly custom solutions in high-performance applications.

Moreover, while multiple chips have populated one package for many years, MCPs are uniquely different from hybrid technologies and MCMs. Evolving from hybrid/MCM technology, MCPs offer the additional advantage of assembling die of dissimilar geometries, the use of mixed technology, and two to eight (the current limit) stacked die on lower-cost substrates by various interconnection methods. The result is the ability to deliver significantly higher performance while still using today's subsystems.

Wafer thinning technologies are the primary enablers for MCPs. The latest thinning techniques can achieve chip thickness of 25 µm. Even with multiple stacking, the eventual package thickness remains below the 2 mm threshold most designers strive to meet. In fact, one MCP supplier, Fujitsu Ltd., has combined improvements in both ultrathin wafer processing and advanced multiple chip packaging technology to produce a slimming process (without the use of chemicals) that has enabled development of an ultrahigh-density MCP that contains eight chips in a stacked format (Fig. 1 ).

1. This ultrahigh-density MCP, released last year, can incorporate up to eight chips in one package with the help of a proprietary wafer thinning process. (Source: Fujitsu Ltd.)

2. The StrataFlash wireless memory system uses stacked multichip packaging technology to fit up to 1 Gb of RAM in an 8 × 11 mm package. (Source: Intel)

One traditional complaint about MCMs that may have transitioned over to MCPs is that they were technology solutions looking for a problem. As MCPs offer more standardized package solutions with the ability to populate different chips inside, they may certainly shake off this old "knock" against a customized approach. With mobile wireless applications clamoring for more functions in an integrated solution, MCPs may be just the ticket for Internet, video, 802.11 or Bluetooth, GPS, and other functions in phones, PDAs, cameras and future portable application developments.

For additional information on semiconductor packaging, go to www.semiconductor.net/packaging