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Companies Develop Tricks of the Trade for Low-k Dielectrics

Laura Peters -- Semiconductor International, 11/1/2003

The initial transition from FSG and SiO2 to low-k dielectrics required several changes in semiconductor processing, from new integration schemes to completely redesigned stripping tools. Now, research into second-generation low-k materials is bringing a whole new set of changes, and many "tricks" are being employed to make these soft, porous films manufacturable.

At IEEE's upcoming International Electron Devices Meeting (IEDM), NEC, TSMC and MIRAI will reveal some of the ways that porous films can be made more robust, by using hybrid dielectric approaches, pore sealing and/or ultralow-downforce CMP.

Researchers from TSMC (Hsinchu, Taiwan) integrated a porous low-k interlevel dielectric (k~2.5) with a low-k etch stop (k~3.0) in copper dual-damascene interconnects in their 90 nm process. The nine-metal-level structure (Figure ) exhibited 21% better RC delay, 100% higher via electromigration endurance and 100× lower line-to-line leakage (with 0.14 µm spacing) compared with current dual-damascene interconnect with an oxygen-doped carbide etch stop (k~4.5). The new etch stop is an oxygen-doped carbide and the porous ILD is an organosilicate glass film. By varying process conditions, the k value of the oxygen-doped carbide can be adjusted from 4.5 to as low as 3.0. The new process does not use an etch stop between the trench and via, nor a dielectric cap layer.

This nine-level copper interconnect with low-k ILD (k~2.5) and etch stop (k~3.0) exhibited 21% less RC delay than the company's current dual-damascene interconnect with oxygen-doped carbide etch stop (k~4.5). (Source: TSMC)

Researchers from Japan's research group MIRAI (Ibaraki) developed a plasma-enhanced copolymerization technique that can be used to independently control mechanical strength and dielectric constant (k) of low-k films. The copolymerization process occurs when vaporized molecules of matrix monomer in the low-k material DVS-BCB (divinyl siloxane-benzocyclobutene) are activated by a low-energy helium plasma. Different monomers serve different functions such as deposition acceleration, matrix formation or reinforcement of the deposited film.

For instance, compounds of CH4, C2H6, C2H4 and C2H2 serve as deposition accelerators, whereas phenyl-substituted saturated compounds (such as dimethylbenzene (DMB) and trimethylbenzene (TMB)) and phenyl-substituted unsaturated compounds (such as divinylbenzene (DVB) and diisopropenylbenzene (DIPB)) increase the molecular weight of the film and hopefully reinforce the matrix. The matrix monomer (DVS-BCB) and reinforcement monomers are introduced to the reaction chamber independently so that growth rate and modulus can be independently controlled.

The MIRAI group fabricated various low-k/copper single-damascene structures and determined that copolymerization of DVS-BCB, DIPB and acetylene could form mechanically rigid, thermally stable low-k films on 300 mm wafers. Interline leakage current density of the copper damascene was <1 × 10-9 A/cm2. Ultralow-pressure CMP (0.5 psi) showed sharper distribution of copper line resistance than with standard CMP (3.0 psi). The studies showed that the addition of DIPB precursor could reinforce film modulus by 10%, while improving thermal stability and leakage current. Higher mechanical strength was the result of coplanarization of the DVS-BCB molecule into DIPB in a phenyl-bridged structure. The Table shows the electrical and mechanical properties of the various films.


NEC researchers in Kanagawa, Japan, also used DVS-BCB, but as a low-k pore sealing layer in a 65 nm node copper interconnect technology. The scheme uses a porous SiOCH film (k=2.5) as the trench ILD and a rigid SiOCH film (k=2.9) at the via levels. The low-k organic silica film (k=2.7) only 4 nm thick sealed the porous film for improved line-to-line time-dependent dielectric breakdown behavior of narrowly pitched copper lines. The interconnects featured a minimum pitch of 180 nm at the metal 1 level and 200 nm at the M2 and M3 levels, with 100 nm vias. Hardness of the porous PECVD film was kept above 5 GPa. Pore sealing was performed after via etch through the porous film, but before nitride open (SiCN cap). NEC used plasma polymerized DVS-BCB film with anti-copper-diffusivity properties. Then the sealing layer and cap were etched simultaneously. While the pore-sealing layer increased sheet resistances slightly, 180 mV was measured for 90 nm-pitched lines. Line-to-line capacitance of the scaled copper interconnects in porous SiOCH was improved by 27% over the 90 nm node interconnects with rigid SiOCH film throughout the ILD.

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