Chartered, IBM and Infineon Collaborate on 65 nm R&D
Peter Singer, Editor-in-Chief -- Semiconductor International, 9/1/2003
Chartered Semiconductor Manufacturing, IBM and Infineon Technologies AG announced a joint-development agreement to accelerate the move to 65 nm semiconductor manufacturing process technology. The multi-year engagement closely aligns Infineon's low-power silicon expertise with IBM's leading process technology and Chartered's efforts to drive a common foundry process platform that scales from 90 nm through next-generation 65 nm technology and provides a path to 45 nm.
Financial details of the new agreement were not disclosed. The work will be conducted in IBM's newly opened 300 mm development lab in East Fishkill, N.Y. IBM and Chartered technologies are among the first on 65 nm circuits developed and produced in the new facility, called the Advanced Semiconductor Technology Center (ASTC 300), which began operations last month. Nearly 200 engineers from the three companies will work together to define industry-leading process technologies for next-generation semiconductors.
Chartered, IBM and Infineon plan to jointly develop a common advanced foundry process at 65 nm, as well as variants tuned for high performance and low power. The companies are also exploring extensions to 45 nm technology. Both IBM and Chartered plan to have the jointly developed 65 nm process installed in their respective 300 mm fabs, and to be in a position to support Infineon's outsourced demand for 65 nm products.
For additional information on wafer processing, go to www.semiconductor.net/wafer
