Designing Tracks for Better CD Control

The definition and control of CDs relies on the complex interaction among scanner, track, photoresist, antireflective coating, reticle, etcher, the substrate and metrology systems. The primary contributors to CD variation within the track are the post-exposure bake (PEB) uniformity, post-apply and post-exposure timing delays, and the develop step (Fig. 1 ). This is not to say that factors such as good resist thickness uniformity are not also essential but, because of the nature of how chemically amplified resists work, the PEB and develop steps have the greatest impact on CD variability and must be the most tightly controlled steps. In fact, some experts attribute up to 30% of the CD error budget to PEB variations from hot plate to hot plate or within the plate.

Track system suppliers have changed the designs of their systems (Fig. 1 ) with the goal of improving CD control. "We've put much focus on PEB uniformity improvements — both during temperature ramps and in the steady-state condition— to improve CD uniformity and wafer-to-wafer control," said George Petricich, vice president of product marketing at DNS Electronics (Sunnyvale, Calif.), a U.S. subsidiary of Dainippon Screen Mfg. Co. Ltd. (Kyoto, Japan).

Rob Crowell, Clean Track product marketing manager at Tokyo Electron America (TEA, Austin, Texas, and TEL, Tokyo) said, "We've made hot plate improvements and hardware changes to the developer, as well as new developer techniques and nozzles to improve CD uniformity. We're also starting to see differences in the way that isolated and dense features pattern, so we address that through modifications to the develop process in the new platform as well."

1. In the Slit-Scan develop module, developer is dispensed from one of two nozzles (two chemistries per nozzle) onto a static wafer. To minimize defectivity, the liquids start and stop dispensing beyond the wafer periphery. (Source: DNS)

The track market has recently consolidated to the point where there are only two major players: TEL and DNS. ASML (Veldhoven, Netherlands), which had acquired SVG's track business along with its exposure tool business, recently sold the track business to Rite Track (West Chester, Ohio), a company that specializes in remanufactured track systems. FSI International (Chaska, Minn.) recently dissolved its track business. Brewer Science (Rolla, Mo.) manufactures coater/developer systems as an outgrowth of its antireflective coating (ARC) business.

The customization of lithography processes specifically for gates, implants, contacts, dual damascene, etc., has increased the complexity of track processes. "It used to be that you had one or two resists that served the needs of the whole process. Now, you can have 15-20 different resist types in a process flow," Crowell said. A single coater can accommodate up to 10 resists (10 dispense nozzles per coat cup). ARC films are coated in a separate module or on a dedicated, separate tool. A typical sequence involves vapor adhesion, wafer chill, single-layer resist coat, edge bead removal, hot plate post-apply bake (PAB), transfer to the scanner for exposure, back to the track for PEB, then develop, rinse and dry.

Bottom ARCs are becoming increasingly common at critical layers. If a bottom ARC is used, the vapor adhesion step is not needed. The less common top ARC layers may be used either to protect the wafer from defects or to help the process window.

A typical track configuration uses three coater cups, three ARC cups and five develop modules. However, there is necessarily great flexibility in the design of tracks to allow, for instance, one module to be swapped for another for maintenance or other purposes, addition of modules, etc.

For chemically amplified resists, pattern transfer occurs during the PEB step. The objective of the PEB is to activate the photo acid produced during the resist exposure, in what is called a deprotection reaction. The acid attacks the bonds of the resist in a self-catalyzing sequence, making them soluble in developer solution. This sequence of events generates more photo acid, and the cycle continues until the process self-quenches. During this process, PEB temperature must be rapidly ramped to a target temperature (also called set point), maintained at that temperature for a specific time, and then rapidly ramped down to near room temperature. The temperature and timing are photoresist-dependent. Target temperature is typically between 110 and 130°C, usually maintained for 60 or 90 sec.

Much of the work on advanced track systems has concentrated on designing better hot plates and improving hot plate matching techniques. A significant challenge lies in reaching the target temperature without overshooting or undershooting, being able to reach a steady-state temperature quickly, and finding ways to compensate for any temperature variations that occur across the hot plate. "With the new technology we have, we can get to target temperature within 30 seconds, which allows us to stay at steady-state temperature for a longer portion of the overall process time. Or we can compress the bake time, which improves throughput," Petricich said.

DNS's hot plate uses heated water vapor as the thermal transfer medium. Plate heating is driven by water vapor rising to the internal surface of the plate, where it condenses in an exothermic reaction. The heat of condensation is more aggressive on cooler areas of the plate, ensuring fast, uniform temperature rise (wafers heat radially from the outside to center). "This is analogous to an infinite zone plate," Petricich explained.

To more precisely control the process, track manufacturers are using multi-zoned hot plates and model-based control software. Rapid heating of large wafers calls for more heating elements on the plates, especially on 300 mm wafers. Because deprotection occurs during ramp up and at temperature, RTD wafers (wafers with embedded resistance temperature detectors) are used to characterize dynamic and steady-state temperature profiles,¹ check deviations from set points and perform plate-to-plate matching. "We have automated the RTD wafer transfer into the hot plate module, and the software makes any necessary adjustments, which takes any human errors out of the process, making it more reliable," Crowell said.

With advanced technology nodes, it has become increasingly essential to fix the transfer time between the end of scanner exposure and the start of PEB according to Crowell. He noted the addition of a dedicated robot for this operation to TEL's platform, and software that allows users to have consistent, fixed delay time.

Following PEB, the wafer is transferred to a chill plate. "The resist chemical amplification reaction propagates until you chill the wafer, mandating immediate wafer cooling, which we addressed with new hardware designs," Petricich said.

Before PEB, the protected resist polymer is hydrophobic; after PEB, the deprotected polymer is hydrophilic, making it soluble in 2.38% tetramethyl ammonium hydroxide (TMAH). The develop puddle, formed by dispensing the TMAH through a vertical nozzle drawn across the wafer in a smooth liquid sheet, is critical to the performance of the develop step. The develop process usually entails TMAH puddle formation, static develop (no wafer rotation), rinsing with water while spinning, ending with a spin dry. However, there are any number of variations on this process using dynamic develop (with wafer spinning), multiple develop/rinse/dry sequences, alternative chemistries, etc.

The develop process shown in Figure 2 is one variation on a standard process using 2.38% TMAH and dilute TMAH. In this work, TEL reported that the dissolution behavior of resist is different between the puddle formation and static develop steps — and both are important to CD uniformity.² In the latter stage, the dissolved resist byproduct diffuses into the TMAH puddle, where byproducts and TMAH are partially mixed. The behavior of this byproduct differs between exposed and unexposed areas, causing CD non-uniformities. By adding the dilute TMAH step, byproduct concentrations were reduced, reducing their interaction with the pattern and enabling a more stable develop process with better CD uniformity.

2. For improved CD control, it is necessary to control not only the initial stage of development (puddle formation) but also the later stage (static development). By controlling the concentration of resist byproduct in exposed areas relative to unexposed areas, CD uniformity is improved. (Source: TEL)

In a recent paper, DNS reported on a short develop process used to pattern 130 nm features with a 193 nm scanner that delivers better process margin (DOF and exposure latitude) and fewer problems of pattern collapse than standard processes.³ The researchers attributed the better results to terminating the develop reaction at the moment the resist dissolution rate was still high. Other benefits to the shorter develop process included elimination of pattern collapse issues and fewer post-develop defects on the wafer (Fig. 3 ). The resist develop rate was affected by the develop application method (static proved better), as well as chemical differences between the two 193 nm resists used. Pattern collapse reduction is possibly attributed to changes in the pattern profile and/or suppression of the penetration of the developer into the resist-substrate interface.

3. Optical/SEM images of typical defects found after develop including stains (a), black spot (b), black bar, likely from a collapsed pattern (c), and a recurring reticle defect (d). (Source: DNS)

Although a shorter develop process could potentially drive down the number of develop modules in a track, Petricich noted that a lot of chemistries require extensive rinsing, so companies will often use the extra time available to run longer rinse cycles with the aim of reducing defectivity.

Integrated metrology (IM) is the incorporation of a measurement system with a process tool to monitor wafer properties inside a process chamber (in situ), or at its conclusion of the process, without removing the wafer from the tool (in-line).⁴ Advantages include the detection of process excursions in near real time, to prevent yield discursions that might otherwise impact several wafers before detection. The drawbacks are the additional cost and footprint of the metrology tool, its potential to negatively impact throughput, due to hardware reliability issues or time required for metrology recipe creation, among other causes. In addition, it is often difficult to match the performance of an in-line tool with standalone tools, which is important to maintaining consistent detection, classification and rework decisions in the fab. Also, the need to speed measurements often goes hand-in-hand with poorer measurement sensitivity.

Nonetheless, IM tools have been finding their way onto track systems for macro defect inspection, resist thickness uniformity measurements, and CD and overlay measurements. Some of these applications are quite mature, while others are more in stages of development. A key advantage to in-line metrology in a litho cell is the opportunity to rework the resist patterning process in cases where the yield impact likely exceeds the cost of rework.

In fabs, after develop inspection (ADI) was initially put in place as a check to see if the resist fully cleared from the exposed areas (in positive-tone resist) and optical microscopes were used to measure CDs. Today, ADI is largely used for CD measurement, macro defect inspection, and also to check film thicknesses.

At the 90 nm node, CD control must be within 11 nm (3 σ) for DRAM devices with a contact CD of 110 nm, and 3 nm for microprocessors with a gate CD of 53 nm (before etch). The measurement precision (long-term repeatability) needs to be on the order of 7.5 Å. The 65 nm targets are even more aggressive, of course: An 80 nm DRAM contact must be controlled within 8 nm, while a microprocessor gate of 35 nm must be controlled within 2 nm. The precision target is 5 Å.

Petricich expects IM to become very attractive at the 65 nm node. "But by the 45 nm node, with optical lithography, I think we will be pressing everything to such a degree that it will be mandated," he said.

The industry is undergoing an interesting shift away from CD-SEMs to scatterometry for in-line CD measurement. It allows immediate feedback and feedforward of data to the etch tool, which can enable improvements in the CD distribution after etch.⁵ Optical methods are preferred for throughput purposes, and every wafer in the lot can be measured, as opposed to one wafer per lot for CD-SEMs.

CD-SEMs also do not provide the profile information (though new algorithms look promising⁶), have a nominal measurement uncertainty of ±2 nm, and suffer from problems of sample charging and CD slimming from 193 nm exposure. "The industry is in the process of validating scatterometry, making sure it provides the level of control that is needed, and then evaluate the hardware, making sure it has the reliability and that an acceptable cost of ownership is demonstrated," Crowell said. He said that in-line CD scatterometry work has been three to five years in the making, and that the same companies that were more aggressive with adopting advanced process control (APC) are taking the lead in IM as well.

AMD (Austin, Texas), TEL, Timbre Technologies (Santa Clara, Calif.) and Therma-Wave (Santa Clara, Calif.) recently demonstrated the production-worthiness of an integrated reflectometer with optical digital profiling (ODP) scatterometry software on a Clean Track-ACT 8 system for CD and sidewall angle process control as well as patterned and unpatterned film thickness measurements.⁷ In this process, throughput of the track and defectivity were not compromised by the CD metrology. The wafer-to-wafer data demonstrated acceptable precision for APC. After accounting for profile measurement differences between SEM and ODP, the engineers determined a good correlation between the two techniques (Fig. 4 ), measuring 44 sites per 200 mm wafer. Correlation with cross-sectional CD-SEM verified profile information.

Since the scanners and track systems are tightly linked tools, the throughputs must approximately match. From a practical standpoint, since scanner cost far exceeds track system cost, the track systems must maintain higher throughputs, which is typically gated by the develop module. Queue times and waiting for robot availability have limited throughputs in the past.

4. Excellent CD correlation between a Sensys Instruments CD-i reflectometer with Timbre Technologies ODP (optical digital profiling) software. The middle ODP CD was chosen, though bottom, middle and top data can be produced. Data was taken at 44 sites on a 200 mm wafer. (Source: TEL)

For low cost of ownership (CoO), resist volumes have been reduced to ~1 mL per 300 mm wafer and 0.5 mL per 200 mm wafer. "Of course, the volume used depends on the chemistry and the topography, as well as the viscosity of the resist," Petricich said. In addition to reducing resist volumes, track processes are optimized to minimize chemical volumes and DI water usage.

Throughputs on tracks are pushing 120-150 wph, which they must maintain to keep up with the scanners. "One of the keys was to break the ARC modules out as separate coat modules with separate cells and robots," Petricich explained. DNS's 150 wph system, the RF³, is configured with three bottom ARC coaters, three resist coaters, five developers and six robots.

Wafer scheduling with the scanner tools is key to high throughputs. However, among the three scanner suppliers — ASML, Nikon and Canon — different interfaces are used and there is a need for standardization.

Track performance, in particular PEB and develop process performance, are closely tied to CD control and CD uniformity. The latest advances in hot plate design and control methods have vastly improved the temperature uniformity across-wafer, while also allowing faster, more accurate ramps to set-point temperature. Controlled timing delays between critical exposure and PEB, and post-PEB into develop, help to deliver more consistent wafer-to-wafer results. Develop processes are being tailored for resist and process needs, giving better control of CDs. The latest track systems are designed to meet the full performance expectations of the 90 and 65 nm nodes.