Company News
Staff -- Semiconductor International, 9/1/2003
Intel Corp. (Santa Clara, Calif.) has detailed its future stacked package technologies, including its ultrathin stacked CSP that allows five 0.13 µm, 1.8 V StrataFlash memory chips to be stacked vertically to a height of 1.2 mm. Intel plans to reduce this by the end of the year to 1 mm, and in 2004 the company plans to begin production using a tape substrate, which will shave a further 0.2 mm off this height. The densely packed flash memory package is aimed at the cellular market.
Fujitsu Microelectronics Europe (Frankfurt, Germany) has created an ultrahigh-density multichip package that can support up to eight chips. The thickness depends on the number of stacked chips per package. Three-stacked packages require 0.15 mm thickness per chip, for example, while five or more demand 0.08 mm or less.
