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Probing Method Reduces Force, Increases Reliability

Alexander E. Braun, Senior Editor -- Semiconductor International, 9/1/2003

As device nodes progress from 180 to 130 and 90 nm architectures, the materials in the interlayer dielectrics (ILDs) used to isolate metal routing layers are switching toward low-k films. The presence of these materials may require that, when probing is done, the force exerted on the contact surfaces on the top of the wafer be considerably reduced. This is because low-k materials tend to have an order of magnitude lower resistance to cracking and breaking compared with traditional SiO2 and other higher-k ILD materials.

FormFactor (Livermore, Calif.) has developed a flip-chip solder contact system that supports its new MicroForce probing technology, expected to increase test yield and improve device reliability when probing high-performance logic, ASICs, microprocessors and DSPs. The system was developed to address a series of wafer sort requirements, including reduced probe force, which typically runs 12-15 g on the bump. The solution reduces this to 1-2 g of force on a solder bump, while consistently achieving a low contact resistance of <1 Ω. This reduces the risk of damaging the fragile low-k dielectrics below. An added benefit of the method is better contact physics and longer life for the probe itself.

The standard way in which a flip-chip bump is probed today requires the application of a relatively high amount of force to create a good contact. This deforms the bump. Typically, a bump is reflowed after probing to repair the probing damage — the bump is heated, and the solder reflows and forms a solder ball making it possible to proceed into the packaging step. However, sometimes it becomes necessary to probe the bumps after they have been reflowed, and this causes renewed concern regarding the amount of damage that may be inflicted to the bump and the materials below.

The new low-force methodology offers the benefit of creating a very short and shallow mark. Being able to control this type of damage is an extremely important aspect when the bump goes from the probing process into assembly and packaging, because the soldering process will not work well if there are voids or large areas under the bumps.

1. The new probe card architecture is designed to probe flip-chip bumps with a minimum of damage. Its unique X, Y and Z motion capability enables it to do its work with a minimum of down force. (Source: FormFactor)

2. Precise tracking of the movement of the spring in the X and Y axes results in a controlled scrub mark. (Source: FormFactor)
A critical advantage of the new probing architecture is the spring contact itself that provides unusual compliance; it can bend in any axis, X, Y or Z (Fig. 1). The company worked with Tokyo Electron Ltd. to develop a customized probing motion that provides the reduced force and reliable contact performance. In a traditional probing application, the force exerted as the chuck is lifting loads the spring element only in the Z direction. As the chuck moves up, the geometry of the spring contact causes the blade surface of the contact to "scrub" or move in the X-Y plane on top of the bump. Using only a prober chuck Z motion leads to a maximum in vertical force on the bump, causing increased bump deformation and risking damage to the low-k materials beneath. The method takes advantage of the shape of the spring by moving the chuck in the X, Y and Z directions simultaneously as the bump is contacted (Fig. 2 ). Because the motion of the spring is being unloaded to keep it from building up the forces that otherwise would if it went straight up, the method results in very low probing force.

There appears to be only one issue with the new technique: Because the motion of the chuck has been made more complicated, the system requires a slightly longer time to go through the contact cycle. At present, this is estimated to be a <10% increase in the time it takes for the probe to go from die to die and become stable. However, work is ongoing to improve the probe's action and do away with this delay.

For additional information on inspection, measurement and test, go to www.semiconductor.net/imt

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