RF SiP Module Turns a Problem Into a Feature

Though they operate at similar bandwidths, the packaging requirements for rf modules are very different than the requirements for high-speed digital modules. Digital applications have driven packaging technology for decades, leaving rf applications the crumbs. The growth of wireless connectivity and the use of pagers, cell phones, wireless LANs and Bluetooth are now beginning to have an impact on the available packaging options.

Both applications require packaging solutions that will operate at higher bandwidth, smaller form factor and lower cost (i.e., faster, smaller, cheaper), but here the similarity ends. High-speed digital chips require hundreds to thousands of I/Os, with controlled impedance interconnects across a wide bandwidth, and thermal management for many tens of watts of power dissipation. Rf modules, on the other hand, have only tens of I/Os, interconnects with precise impedance properties across a narrow bandwidth of frequencies, and power dissipation of a few watts.

Though both modules require passives, the specific features are completely different. Digital applications require large values of low-inductance capacitors and many precision resistor values near either 50 or 100 V. Inductors in the package are problems, not features.

The Pyxis rf SiP module integrates a µBGA CSP with IPOC substrates, flip-chip active devices and an integrated heat spreader/EMI shield. (Source: Tessera)

A number of system-in-package (SiP) technologies, targeted for rf applications, have been introduced in the past few years. They all build on conventional packaging substrate technologies by incorporating some type of passives. For example, low-temperature co-fired ceramic (LTCC) packages use capacitor and inductor structures buried in the ceramic layers with resistors patterned on the top surface, available for laser trimming. Laminate substrates use discrete surface-mount capacitors and resistors with the inductor elements patterned in the copper layers.

Tessera (San Jose) has introduced a new technology, termed Pyxis, which integrates its µBGA chip-scale package (CSP) technology with integrated-passives-on-chip (IPOC) substrates, flip-chip active devices and an integrated heat spreader/EMI shield. This new technology "builds on well-established µBGA technology and leverages existing infrastructure to provide a cost-efficient rf packaging option," said Craig Mitchell, vice president of marketing.

The substrate in a Pyxis module is a silicon chip with only integrated resistors, capacitors and interconnects. Inductors on silicon substrates generally have very low Q because of coupling to the substrate, and are avoided in this technology. The metalization is one layer of aluminum, with Si₃N₄ as the capacitor dielectric. Capacitor values can be as high as 500 pF. This wafer is fabricated on a standard CMOS line with a low-cost process.

To this IPOC substrate, the active semiconductor chip is flip-chip-attached. In the first functional module, Tessera assembled two GaAs chips to create a tri-band GSM/GPRS power amplifier. These are standard bumped GaAs and nothing special was done to them to use them in this power amplifier (PA) module, according to Mitchell. The surface metalization on the IPOC routes the GaAs pads to the passives and to peripheral pads that are connected to a flex overlay.

A standard µBGA flex film is attached to the top of the IPOC chip and gold fingers are thermocompression bonded to the peripheral pads of the IPOC. The bond pads from the IPOC are routed to peripheral I/O pads on the flex film. In this PA module, 18 pads are on 0.8 mm centers, similar to conventional small packages.

An important driver in µBGA packages for high-speed digital applications is minimal inductance in the leads. The Pyxis module takes advantage of the inductance of the leads. When integrated inductors are needed, they are patterned as free-standing coils in the flex film. With relatively wide, thick copper traces suspended in low-loss dielectric, integrated inductors are high Q. What might be a problem in digital applications is made into a feature for rf applications.

The last step in the assembly process is attachment of a heat spreader to the IPOC and GaAs chips, and an optional EMI shield. The assembled module is then over molded with epoxy.

According to Tessera, the Pyxis PA module reduces the package area by 75%, height by 60% and cost by 50% over conventional laminate PA modules.

For additional information on assembly and packaging, go to www.semiconductor.net/assembly.