Origami-Style Structure Simplifies Packaging Efficiency
Eric Bogatin, Contributing Editor -- Semiconductor International, 2/1/2003
It's the silicon that does all the work of information processing and storage. Yet, look at a circuit board and most of it is empty space. The packaging can only increase the size, weight and cost while decreasing the performance of the silicon. But a new packaging technology is changing the landscape of boards.
One commonly used metric for packaging's impact is packaging efficiency. This is the ratio of silicon area to package footprint area. Some pin grid arrays (PGAs) have an efficiency of <10%. Some ball grid arrays (BGAs) can have an efficiency of 20%. Chip-scale packages (CSPs), by their very nature, have an efficiency of >80%. One of the driving forces for multichip modules (MCMs) or system-in-a-package (SiP) is their higher packaging efficiencies, which approach 90%.
Over the past five years, a new packaging technology has allowed packaging efficiency to exceed 100%, approaching in some cases >300%. This is the use of stacked die in a single package. Stacked die are currently being used where size or weight has a high value. All cell phones shipped today have a stacked SRAM and flash memory package. All laptops with a graphics accelerator chip have a graphics ASIC stacked with an SRAM chip. Most of the current stacked die approaches literally die attach the second die on top of the first die and wire bond both of them to each other or to the common substrate. This is straightforward when the die are very different in size, such as an ASIC and SRAM. It is more expensive when they are similar, requiring a thick interposer between the die to allow room for the wire bonds.
Tessera (San Jose) recently introduced three new technologies for stacked die as alternatives to one die on top of the other with both wire bonded. These approaches are grouped under the family name of µZ packaging, referring to the stacking of multiple chips in the Z or vertical direction.
The µZ folded package is, in the words of packaging expert Joe Fjelstad, "origami packaging." A flex substrate is fabricated with multiple die sites, appropriately interconnected by the substrate. The die are attached, wire bonded and encapsulated at each site. The flex is then folded into a compact form, bringing each die on top of the adjacent one. Either the underside of the flex below the bottom die or the end of the flex is the attach footprint of the module.
Though potentially more expensive than alternatives, this innovative approach led the way to the other two approaches.
The µZ Ball Stacked package is specifically designed for stacks that are of the same size die, such as DRAM. This is the most difficult configuration for conventional stacked die because an interposer is required between each die. In Tessera's approach, each die is mounted to an individual substrate that routes the interconnects to the periphery in multiple rows of solder balls. These single-chip units are stacked and the solder balls connect one layer to the lower layer. The bottom substrate contains the footprint for the board attach.
The µZ Fold-Over package is a way of packaging a single die so that it can be assembled in a stack using other packages or bare die. A two-layer flex substrate is the carrier for the first die. In addition to the die-attach site, there is a pigtail that will be folded over on top of the assembled die. Beneath the die-attach site, the flex has a BGA footprint for mounting to the board.
After die attach and wire bonding to the flex substrate, the die is over-molded and the flex pigtail is folded over the top of the die. The resulting package is basically a flex BGA (FBGA), with a footprint on the top of the package that is interconnected to the chip beneath, and the BGA footprint to the board attach. This packaged die can be handled, tested and assembled as any FBGA packaged part. What makes it special is that additional packages or bare die can be stacked on top of this package.
"The Ball Stacked package is ideal for DRAM stacks while the Fold-Over package is ideal for wireless applications where the base band chip must interface to its own stacked memory package," said Craig Mitchell, Tessera's vice president of marketing. Both approaches enable packaging efficiencies of >200%.
For additional information on semiconductor packaging, go to www.semiconductor.net/assembly.
