Mix-and-Match Lithography Tackles Tighter Requirements
Aaron Hand, Managing Editor -- Semiconductor International, 2/1/2003
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Semiconductor devices are made up of several layers of circuits, one printed on top of the next, and each with its own tolerances. The very critical levels need the best tools available, with the best resolution and the best alignment. There are also intermediate and coarse levels, all with varying requirements and specifications. To print all those layers, there are several lithography options and wavelengths to choose from — i-line (365 nm), 248 nm, more recently 193 nm, and in the future 157 nm, extreme ultraviolet (EUV), e-beam projection lithography (EPL), and perhaps any number of other tool choices.
Although the critical layers of today's leading-edge devices may need the resolution that 193 nm lithography has to offer, it's hardly practical to use such an expensive tool to print all the layers of the device. Nor is it even practical to print a typical device with just 248 nm tools. But the right mix of tools depends on several competing factors. As the wavelength gets shorter, the tools become more expensive, not to mention the resists. But prolonging the life of an older tool through resolution enhancement techniques could increase the cost of the mask set beyond what's practical for the manufacturers of some types of devices. "I could use the i-line tool to produce features somewhat less than a quarter micron. But I could use a strict binary mask with 248," noted Walt Trybula, a senior fellow at International SEMATECH (ISMT, Austin, Texas). "On the other hand, you have certain areas where you could use the exact same mask on the 193 system."
Mix-and-match lithography may be a somewhat complex science, but it's a cost-of-ownership must. Factory utilization is typically at ~50%, according to Art Zafiropoulo, chairman and CEO of Ultratech Stepper Inc. (San Jose). Given that, the industry needs to improve utilization and cut hardware costs through mix and match, he said.
The move to 300 mm wafer production is the main reason that Zafiropoulo expects a resurgence in mix-and-match lithography. Of course, with the new 300 mm fabs equipped with all the latest state-of-the-art technology, there is virtually no mix and match going on currently. But within the next few years, those fabs will begin to move in that direction, he said. In a typical 300 mm factory, the first installation uses the most expensive equipment for all the layers. But as capacity begins to build, the fab will be equipped with less expensive tools, and will begin to use critical tools just for the critical layers.
"People have to be focused on how to save costs," Zafiropoulo said. With yield already at some 90%, cost savings will come by invoking the use of mix and match more, he said. "Would you buy a stepper for $20M when you could buy one for $3M to do non-critical processes?"
Ultratech pioneered the concept of mix-and-match lithography around 1990, Zafiropoulo said. "We promoted that whole concept. It grew fairly substantially, and then fell off. But I think there's going to be a resurgence in two to three years." Mix-and-match lithography is changing from a two-wavelength model to a three-wavelength model, he said, including i-line (or even ghi-line), mixed with 248 and 193 nm tools. Chipmakers may even go to four wavelengths, hanging onto i-line even while adding 157 nm tools, he said.
Motorola's 130 nm process, for example, uses 248 nm lithography for the critical layers, but also uses a good deal of i-line tools, according to Joe Mogab, vice president and director of Motorola's Advanced Products Research and Development Laboratory (Austin). Although it may be used for fewer and fewer layers, and will be used for what Motorola calls the "loose" layers, Mogab expects i-line technology to persist for several generations. "In our 90 nm generation, we'll employ for the first time 193 nm lithography. But we'll be mixing it with 248 and i-line," he said. "The idea is to extend those technologies as long as you can."
Under controlMix-and-match lithography has been used for years, and does not present the headaches today that it did 10 years ago, although there are still certainly allowances to be made for machine differences, said Bill Arnold, chief scientist for ASML (Tempe, Ariz.). "When I was working with AMD, one time I had to mix a stepper and a 1× aligner," he said. "That was really difficult because the 1× aligner had a very substantial bow in the overall placement on the wafer. We had to program the stepper to follow this bow pattern. Things have gotten simpler, but a lot of the issues were substantially the same as we have now."
Although the ability of today's tools for meeting overlay requirements has certainly improved, overlay and CD control are still significant challenges, particularly as design rules continue to tighten, according to Zafiropoulo. Each machine has its own optical fingerprint, each with its own lens distortions. If using a dedicated machine for a device, you can have the maskmaker offset that error in the mask. "Theoretically, you can print every layer in the same machine," Zafiropoulo said. "There are some companies that are trying that. That is not a great manufacturing strategy, but they're trying."
Ultratech does what Zafiropoulo calls "true mix and match," fingerprinting new and existing machines to develop mix-and-match strategies for production. Customers give Ultratech fingerprints of their existing machines, Ultratech compares them with the fingerprints of their own machines, and makes optimal matches. "We have mix and match with every single reduction stepper in the world today (including Nikon, Canon and ASML). We're the only company that can do that," Zafiropoulo said, explaining the big three manufacturers can't get each other's data for this purpose. "We're a complementary company, not competition. So they'll share information with us that they wouldn't share with each other."
Although today's mix-and-match issues are not enormous, Mogab said, field size differences between tools do present somewhat of a challenge. "Where you have a significant divergence of field size, the issue you begin to face is whether you can maintain the productivity, particularly with the older tools," Mogab said. "The older tools do the bulk of the layers, so you want to be sure to keep productivity at its peak." Difficulty doing that compromises the overall cost of production, he added.
The old i-line steppers are typically 5× reduction tools with a 22 × 22 mm field size, while 248 and 193 nm scanners are 4× tools with a typical field size of about 26 × 33 mm. Using just the common area between the field sizes reduces field usage and scanner throughput significantly. ASML offers i-line scanners, and Nikon offers wide-field steppers, both solutions commonizing magnification and field size with DUV scanners. "One of the reasons we do that is to minimize the matching errors between machines, ASML's Arnold said. "There's not a lot of difference in matching between two i-line scanners or an i-line scanner matched to DUV."
Matching a scanner field, therefore, might require a chipmaker to buy a new i-line tool. This may seem contrary to the idea of mix-and-match lithography enabling continued use of older tools, but a new i-line tool still offers a substantial savings over a leading-edge tool. Besides the cost of the tool, the cost of the consumables — resists, namely — is a lot higher with 193 nm systems than it is with 248 nm or i-line systems.
To illustrate just how difficult the situation can get, Mogab mentioned the consternation with which chipmakers received the original proposal for 157 nm lithography, which was to arrive with a 5× magnification. "That really caused us some heartburn," he said. The industry did extensive analysis, and chipmakers decided they just couldn't accept a 5× magnification coming in with their existing 4× tools. "Ultimately, the equipment makers moved away from that proposal," Mogab said. Even though calcium fluoride lenses, for example, are more difficult to make at 4× than at 5× magnification, the mix-and-match issue was perceived as being a more prohibitive market deterrent.
Continuing i-line?As production processes move down into the 65 nm node and beyond, devices will have a very large number of layers, and more and more of those layers will be critical, noted Phil Ware, senior fellow, lithography at Canon U.S.A. Inc. (Irving, Texas). The pessimistic view, he said, is that some of those critical layers will have such tight tolerances it may not be practical to mix even the same type of tool. The design targets may be too critical for any tool to match. But then the question becomes, Can you really operate on dedicated machines in a high-volume production line? "That's a ramification of pushing the roadmap so fast," Ware said.
Although it depends on the application — whether it's memory-intensive or more logic-intensive, for example — a typical full-blown device made by Motorola will have 25 or so layers. And that number is expected to rise to 30 or more at the 90 nm node and beyond. Motorola divides those layers into four types: critical, some four to five layers requiring the best tools and tightest tolerances; sub-critical, where the tolerances aren't as tight but the feature sizes are still challenging; non-critical; and loose. It's the loose layers that are likely to remain with i-line for some time, Mogab said, although 65 nm production is likely to include just one or two layers of i-line.
But Trybula questions the logic of using i-line at the 65 nm node when it would only be used for a few levels. Instead, it makes sense to minimize the number of different wavelengths being used. "The cost of the training, the spare parts and everything else will probably offset the savings in production," he said.
John Wiesner, senior vice president of engineering at Nikon Precision Inc. (Belmont, Calif.) sees the use of i-line lasting indefinitely, particularly for such coarse features as pads (Fig. 1). "You've got to get the signals out to the pins. And those signals are going to come out with some kind of wires," he said. "Something has to be coarse someplace." Overlay requirements
Even though some layers have patterns with relatively large geometries, the placement requirements may still be very tight. "You can have a lower-resolution tool, but if it's a lower-capability overlay tool, then you have problems," Ware said.
"Overlay is going to be a very critical issue as we start getting smaller and smaller," ISMT's Trybula said. The industry continues to operate on a CD/3 rule, meaning that overlay tolerance is approximately one-third the value of the node (Table). At 65 nm, then, overlay tolerance goes down to 20-21 nm. To help with this situation, Trybula said, critical-level masks may all be written on the same mask writer to minimize differences in masks. Very, very critical layers may require a dedicated lithography tool. Even two tools of the same model have overlay error associated with them. "It may only be 5-6 nm, but that's one-third of our budget," Trybula said.
A key component of overlay is alignment target detection capability. Complicating matters is the fact that each tool manufacturer uses a different alignment system. "We work hard on the alignment marks and want to commonize them as much as possible," Motorola's Mogab said. "We typically look at this very carefully when we go out to make a mask set."
From a toolmaker's perspective, it's difficult to satisfy customers with two different alignment systems. But, given the fact that the lithography market has contracted to just three main suppliers, alignment has become a more manageable problem, Arnold said. Each of the three suppliers is well aware of what their competitors are using for alignment marks, and they are able to offer customers some solutions when it comes to mixing and matching with competing tools. Situations in which chipmakers are using lithography tools not manufactured by ASML, Nikon or Canon have almost disappeared, he said, conceding that ASML's customer support team does sometimes have to help a customer mix and match to some now-extinct machine. "We do what we can there."
The ability to capture another aligner's targets can be difficult. "You have all kinds of customers who have all kinds of older machines," he said, adding that alignment targets are not always readily captured. "There are a lot of different tools out there. Some of the older ones, they can be a big problem due to the imprecise placement of alignment targets. We can put some more flexibility in our machine, but it usually takes away from throughput, which is not what people want. If you have to search around for a target, you're not stepping the wafers."
To make matters worse, the metrology tools that are used to measure the overlay errors often use yet another target, Arnold said. Perceived overlay errors could in fact come from differences in the metrology tool, and not an actual error.
One solution for the chipmaker is to include all the different alignment targets on the wafer, but that eats up useful real estate, Arnold said. "People typically want to print die, and not a bunch of alignment targets." But Mogab said this is not really a problem because the marks can be out in the scribe lines. "So there really isn't a real hit in terms of useful wafer space."
There's always a push from chipmakers for smaller alignment targets, Arnold said, as well as standardized targets. But standardization is not really feasible because of the different optical principles employed, he said. "It could be over time that customers who have multiple types of tools will eventually broker some kind of discussion on standardization, though."
Of course, the easiest way to have common alignment marks is to purchase your lithography tools all from the same supplier, from generation to generation. "But we're always looking at what the overall supplier market can offer us," Mogab said.
Another issue involves the integrity of alignment marks. "Any lithography step has the ability to put down an alignment mark for succeeding steps," Nikon's Wiesner said. "But if you're doing metalization or CMP or whatever, what does that do to the alignment marks?" Nikon is working on strategies to make alignment marks more robust, putting features around the marks to protect them, for example, said Wiesner and Chris Sparkes, Nikon Precision's director of technology.
Next-generation mix and matchContinuing forward, CMP is only likely to be more prevalent, Sparkes noted, further contributing to the degradation of alignment marks. Other considerations for the march to lower nodes include the eventual introduction of next-generation lithography techniques.
Motorola anticipates using EUV lithography beginning two generations beyond 65 nm, Mogab said. "We expect that generation will probably have four to five layers that we'll begin to use EUV. The next generation will be principally EUV." EUV will likely be mixed with 157, 193 and some 248 nm lithography.
But Mogab doesn't anticipate a lot of problems with EUV mixing with older tools. "For field size, it looks like we'll be in reasonably good shape," he said, adding that magnification will stay at 4× for EUV. Unforeseen problems could certainly crop up, however, he conceded.
"There may be some subtle differences that we don't know about yet," Arnold agreed. "The reticles are quite different. So there may be something that comes out of reticles, but I don't really expect it."
EPL, however, presents a substantially different imaging scheme, and could pose some challenges, as well as opportunities. Canon's Ware wonders if mixing optical scanners with EPL is even practical. "Your reticle is completely disassembled into components of the entire pattern that are basically deconstructed and have to be stitched back together," he said. Dynamic stitching remains a critical issue for EPL as a whole, Ware noted, and could pose even more problems for mix-and-match lithography. "You don't have the same kind of vectors to deal with — scanning a full field vs. a field that's been stitched together."
Nikon, the lithography tool manufacturer currently supporting EPL development, completed full system integration in November, and started fine tuning in December, according to Wiesner. For stitching from subfield to subfield, the total error mismatch is under 20 nm, he said, emphasizing that the tuning hasn't finished and further improvements could be expected. "Right now we're looking at trying to introduce EPL at around the 65 nm node," Wiesner said. "There, the 20 nm error is marginally acceptable."
A key argument against the use of EPL is its slow throughput. But EPL is optimal for printing contacts. Optical lithography is having a more difficult time handling such two-dimensional features, and is having to turn to such schemes as using two masks per level, each mask printing every other contact. "A slower throughput on an NGL system can be very cost-effective," ISMT's Trybula said.
For contact layers, e-beam throughput is not far off, Wiesner said, particularly when considering that a two-mask technique doubles the throughput time of optical lithography. The transparency of a contact mask — the ratio of the hole area to the total mask area — is only a few percent. The primary limitation on resolution is the amount of current in the imaging beam. For a contact layer, which only needs a few percent, the beam can run with a much higher current density. That means the dose rate on the resist is higher, which means the machine can run faster. "Contact layers speak to moderate the weakness of e-beam by limiting current," Wiesner said. "And contacts are a natural problem for optical tools."
Once EPL is limited only by cost, Nikon expects it to be used in a mix-and-match strategy in which five or six layers (the contact layer and early vias) are printed with EPL, Wiesner said.
EPL even has the potential for mix-and-match lithography within a layer, according to Trybula. "What if I take a critical level, write a portion of it with an e-beam tool, and write less critical features with optical? People are looking at this," he said. "An e-beam tool is very slow, but if there's only a few features that you have to do, and then you do the rest with optical, it could be cost-effective."
Although Wiesner doesn't think an intralayer mix-and-match scheme would be cost-effective for contact layers, he did theorize that a gate layer might make sense for mix and match. "Transparency of the gates alone would probably be in the 5-10% level," he said. "With everything else, you're talking about a total transparency of 15-20%, so that would slow EPL down." In this case, mix and match on the same level might work well.
Although Trybula is not aware of any chipmakers actually doing mix-and-match lithography on the same level now, it may make sense for some. "Especially for the people who are doing ASICs, because of the mask costs," he said. "One ASIC company has said that it prints six wafers per mask set. If you translate that to 300 mm, you get three or less wafers per mask set. If I can take one $400,000 mask, reduce that to $20,000 because I do a portion with e-beam, then I can save a lot of money."
Regardless of the type of lithography tools being used, most experts are convinced of the continued need for mix-and-match strategies. "The end users are going to have to begin to use mix and match more and more," Ultratech's Zafiropoulo said. "And not just by bringing old machines in and calling it mix and match. But true mix and match."
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