Low-k Dielectrics Pose New Reliability Concerns

The transition from Al/oxide to Cu/oxide interconnects caused fundamental changes in reliability behavior. The dual-damascene architecture introduced different transport path, flux divergence and damage mechanisms. Copper interconnects exhibit bimodal failures — with the early failures dominated by void formation at the via bottom interface and late (strong) failures the result of voiding in the trench. The weak mode relates directly to the Cu/Ta interface quality. The voids cause stress migration (SM) and/or electromigration (EM) failures.

With the introduction of low-k dielectrics, with their weaker thermal and mechanical properties and higher coefficients of expansion, EM performance degrades further. A recent study by researchers at Texas Instruments (Dallas), International SEMATECH (Austin, Texas) and the University of Texas (Austin) revealed that a statistical approach can be taken to investigate EM reliability of Cu/low-k interconnects and compare results with Cu/oxide interconnects. They identified a new failure mechanism that can be attributed directly to the weaker thermal and mechanical properties of low-k materials. The researchers reported on their findings at the IEDM conference in December 2002.

The study used multi-link line/via structures to facilitate early failure patterns as well as critical length dependencies. The cumulative failure distributions from early failure tests at 325, 350, 375 and 400°C for 0.5 µm Cu/oxide structures demonstrated void formation at the via bottom and the cathode end of the M2. The void forms very quickly while the strong mode void forms more slowly because more time is required for sufficient mass depletion to cause a failure.

The activation energy for the via voiding failures was found to be 1.0 eV. When early failures from 0.5 µm devices were compared with 0.35 and 0.25 µm devices, the population of weak mode failures increased, demonstrating the relative linewidth dependence (between via and line) on EM reliability.

Using a porous low-k dielectric (JSR LKD-5109), a spin-on methylsilsesquioxane (MSQ) material with a k value of 2.2, EM tests were performed on dual-damascene structures at 240, 260, 280, 300, 325, 345 and 365°C at 1.0-3.0 MA/cm². Once the test temperatures were corrected for Joule heating, the activation energies were determined to be 0.8 eV for Cu/oxide and 0.9 eV for Cu/MSQ. The researchers noted that the value for the MSQ film was similar to that of porous SiLK low-k dielectric. Activation energies in the 0.8-1.0 eV range reflects mass transport at the Cu/cap layer interface and suggests a similar mass transport mechanism of interfacial diffusion.

The EM lifetimes of the Cu/MSQ structure was shorter than that of Cu/oxide interconnects, which the researchers attributed to a faster net drift velocity of Cu ion in Cu/MSQ interconnects. This can be caused by a smaller back flow stress due to less thermal/mechanical confinement in Cu/low-k interconnects. Some of the voids formed in the EM test occurred at the Cu/nitride cap interface showing lateral copper extrusion, which was followed by interfacial delamination. This new failure mode affects Cu/low-k interconnect EM reliability, indicating that material and processing changes are needed to prevent these types of failures.

For additional information on yield management, go to www.semiconductor.net/yield.