Ceramics Technology Top 10

The Ceramic Interconnect Initiative (CII), an alliance of more than 63 companies and organizations involved in the support and development of ceramics for use in packaging and interconnect applications, has presented its ranking of the top 10 developments in ceramic interconnect technology for 2002. This list provides insight into where ceramic materials are and may be going in the near future.

Ceramics technology includes LTCC (low-temperature cofired ceramic), HTCC (high-temperature cofired ceramic), thick film on ceramic, direct bond copper, thin film on ceramic, plated copper on ceramic, and photo-patterned thick film. The common theme is use of a ceramic material as the key ingredient. CII, which operates under the auspices of the International Microelectronics and Packaging Society (IMAPS), recognized the following companies:

Heraeus Inc. (New York, N.Y.) took 1st place for introduction of the HeraLock tape system. This LTCC material and silver conductor, fully compatible with current LTCC processing, has <0.2% shrinkage in the X-Y direction, and a shrinkage variation of <0.014%. Typical LTCC materials shrink as much as 10% with 0.2% variation. With conventional materials, an 8 in. sheet will have as much as 8 mil registration inaccuracy at the edges. With this new material, the registration variation could be <0.5 mil. This will enable the use of larger substrates so that large panels can be used in production (Figure), thereby reducing manufacturing costs. Zero shrinkage also enables integration of precision cavities, which are important for electro-optical and biomedical applications.

7 × 11 in. LTCC panel enabled with HeraLock zero shrink LTCC. (Source: Heraeus Inc.)

CAD Design Software (Los Gatos, Calif.) took 3rd place for its recently released Hybrid Designer software tool. In addition to existing tools customized for BGAs, µBGAs, lead frames and stacked die, the Hybrid Designer automates some of the routine tasks associated with creation of die pad outlines, stair-stepping via generation, wire bonds and serpentine thick-film resistors. Three-dimensional geometries are created from standard input formats such as GDSII, while the output files can drive production equipment such as automatic wire bonders and epoxy dispense machines. This tool supports all formats of ceramic substrates, from thick film to LTCC. These specialized features enable a designer to be much more efficient and achieve shorter design cycle times.

Midcom (Watertown, S.D.) and Electro-Science Laboratories (ESL, King of Prussia, Pa.) jointly received 4th place for development of a ferrite material compatible with LTCC layers. With this material, magnetic devices such as inductors, transformers and common mode chokes can be fabricated using conventional screen print, laminate and cofire LTCC processes. The new ferrite material is another layer in the standard LTCC stack-up. In addition to lower manufacturing costs, the footprint of magnetic devices fabricated with this material can be decreased. This brings LTCC substrates into the wider realm of analog and power products.

Kyocera (San Diego) took 5th place for a low-resistance patterning process for HTCC substrates. Although HTCC has better thermal conductivity and is mechanically stronger than LTCC, the conductors have a higher sheet resistance due to the use of only tungsten or molybdenum. Kyocera has developed a technique to pattern the conductors in HTCC substrates, so the sheet resistance is reduced from 10 mV/sq of conventional HTCC down to 3 mΩ/sq, comparable to LTCC. This will enable HTCC substrates for higher-power applications.

The 6th- through 10th-place winners were selected for their use of ceramic substrates in leading-edge applications. They included NEC (Tokyo) for a 60 GHz LTCC substrate; SatCon Technology Corp. (Cambridge, Mass.) for wide-bandwidth termination structures; Philips Semiconductors (Eindhoven, Netherlands), National Semiconductor (Santa Clara, Calif.) and Motorola (Phoenix) for Bluetooth modules; and Plextek (Essex, England) for a 21.4 GHz dielectric resonance oscillator.

Advances such as those highlighted by CII — in materials development, tools, processing technology and applications — will allow ceramics to remain one of the cost-effective choices for packaging technologies.

For additional information on semiconductor packaging, go to www.semiconductor.net/assembly.