Yield Management: No Longer a Closed System

Yield management is the management and analysis of data and information from process and inspection equipment for the purpose of rapid yield learning, coupled with the identification and isolation of yield loss sources.¹ For our industry, a tenths-of-a-percent improvement in yield can result in the savings of hundreds of millions of dollars.

"Fabs are having a tougher time predicting device yield improvement," said Shawn Smith, general manager of yield enhancement services at Applied Materials (Santa Clara, Calif.). "If you look at five or six devices at the 0.13 µm node in a 200 mm fab, you cannot predict whether they'll meet standard yield improvement expectations because a system doesn't exist that can ensure yield will progress at a certain pace."

"Achieving successful and stable pattern transfer is one of the major challenges manufacturers face today," said Mike Slessor, director of advanced lithography programs at KLA-Tencor (San Jose). "As the industry moves to smaller design rules, lithography and etch process windows — as well as the overall 'yield process window' — are shrinking. Process parameter variations, tolerable at larger design rules, now cause significant parametric and functional yield problems. Additionally, with the strong nonlinearities of low-k₁ lithography — including the mask error enhancement factor — reticle defects that didn't print at larger design rules are now appearing as significant yield killers. Time-to-information is also critical. When problems arise, they must be detected as early on as possible, and corrected to avoid wafer rework and scrap."

"Manufacturers want engineers to spend less time doing data analysis for yield improvement, instead relying on automated tools for this analysis," said Dan Nelson, director of strategic marketing at August Technology (Bloomington, Minn.). "They want yield improvement decisions — or defect classification decisions — out of the operator's hands."

Most yield management problems originate from shorter product lifecycles and designs put into the fab when they get minimal yield. It is difficult for manufacturers to judge which facet of yield improvement activity to focus on for each product, because each may have fab-inherent trailing integration and defectivity issues, or design flaws.

"The hurdle is tackling the data volume," Smith said. "When accounting for design data, exemplified by the functional test program data logs, defect and in-line metrology data, and finally parametric data — all of which relate to process integration concerns — we're talking about data volumes measured in terabytes." (Fig. 1)

1. It is projected that the average fab’s database will reach the 20 TB level by 2004. This assumes a fab running 200 mm or larger, 0.25 µm or smaller, with 20,000 wpm throughput. The estimate assumes a 5:1 data compression. (Source: Applied Materials)

Applied can incorporate all pertinent data in one database and, with the use of an automated data analysis methodology, obtain a list of issues that will impact yield and, in some cases, determine how processes can be improved. "There always are integration issues that improve yield," Smith said. "Parametric data is particularly valuable in today's pursuit for increasing 0.13 µm yield; it's growing in relative importance to defect data as baseline fab yield control's main driver."

If a fab keeps only four cycle times worth of product data and chamber information for corrective actions, fault detection, advanced process control (APC), etc., its database will reach the 20 TB range, presenting a substantial infrastructure challenge to yield management efforts. "Although complex and difficult to maintain, a large database is necessary to take advantage of cost-saving technologies such as APC, fault detection, and even SPC at the chamber level," Smith said.

Nelson predicts future use of automatic defect classification (ADC) or some variation such as off-line review, where the inspection or characterization system, metrology, etc., collects data and stores it off-line for engineering review. "Manufacturers want the computer to do the work, minimizing time — they don't want engineers spending too much time performing data analysis and moving files and pictures around, comparing and contrasting."

Computerized defect classification, statistical analysis, and decision-making about the defect requires determining whether it is a killer defect and identifying it. A new magnitude of inspection is required to detect at a different level — nanometer-resolution defect detection. The concept of automation and complete defect classification with the proper characterization will force a refocus toward inspection systems with higher defect resolution and robust throughputs. Inspection must also be done at different points in the fab, because previously unimportant problems are now issues. "Not only must we classify and understand defects, but track them to determine whether they'll become killer defects," Nelson said.

The data avalanche is a concern. "We do bump inspection and collect tremendous amounts of data off the top of these bumps, just to measure height — but raw data is useless," he explained. "Statistical analysis reduces the data set to meaningful defects from those we don't understand or cannot otherwise classify. For example, some inspection systems might identify a scratch on the wafer as single defects in a row instead of one scratch. Once statistical analysis determines that it is one large one, a sizable portion of data needing analyzing is eliminated and stored in the memory area that identifies it as a scratch. Data analysis must occur at the tool level — what gets to the fab level should be a reduced set that tells the story."

"When yield management systems began, the hurdle was knitting together the different data types," said Carl Scharrer, semiconductor applications specialist at Keithley Instruments (Solon, Ohio). "The various types and sources include physical defect classification from the KLA ellipsometric measurements, electrical in-line post-etch (poly, salicide and metal) for linewidth, resistivity, interlevel dielectric integrity and antenna damage — then the logistics of aligning their sampling to get data at the same wafer location (preferably the same structure). This was problematic since ownership of the data collection tools was organizationally segmented."

With CMOS, primary metrics are electrical gate length, equivalent gate dielectric thickness, and gate dielectric integrity. These have the greatest effect on product performance and reliability models. "The problem in getting good electrical or physical gate length is that, if done earlier in the process to make adjustments and limit the value-add to bad wafers, it must be done after the gate poly etch," Scharrer said. "There are structure limitations (thermal budget), and you end up requiring an aggressive voltage resolution that may push you to another solution. When you have all the data sources integrated together, they change." Getting data in-line with high correlation to product performance and reliability allows early disposition before adding further value to the process.

High-leverage data is necessary. As Scharrer puts it, "Forward-looking data showing the in-die or across-wafer variation is unacceptable on a given wafer saves tremendous value by that wafer's early disposition. Rather than setting up one measurement, we set up a measurement suite and two or three levels of conditional measurement suites where, depending on what you find in real time, you adjust your measurement strategies — all this without operator intervention and without cycle time loss. This reduces the overall amount of data collected, increases the value of that data, and improves the disposition's accuracy."

Paul Blackborow, vice president of corporate marketing at MKS Instruments (Andover, Mass.), views yield management's direction as enabling rather than one of direct participation. "Customers complain that they cannot get enough data out of tools. A reason is that SECS — the standard way of getting data from most 200 mm tools — is bandwidth-limited and a point-to-point protocol, so only one host talks to just one tool at a time." Today, multiple yield management networked applications must access tool data (Fig. 2). There may be three or four applications — such as an e-diagnostics program from an OEM that wants to get into a tool, a yield management or fault-detection program, or a run-to-run control program — that simultaneously require the data from the tool but cannot get it.

2. To improve and streamline the functioning of yield management, OEMs and fabs must consider new data and connectivity requirements. (Source: MKS Instruments)

Many tools have several analytical instruments, including pressure sensors, flow sensors, power supply sensors, mass spectrometers and thickness measurement devices. "Until 300 mm, communication was analog: relatively little data," Blackborow said. "You got data on the pressure or the power. However, while now instruments do more, many tool manufacturers don't implement all capabilities. We provide power supplies with digital outputs that can give all kinds of information, but often the OEM only hooks up the forward and reflected power measurement. Thus, somebody trying to do fault detection, yield matching, determining where a problem occurred and how to match it to yield, lacks data."

The tool's primary function is wafer processing, and because getting the process to work is difficult, accessing diagnostic data is almost a marginal consideration. Now, computing power is inexpensive and the instruments surrounding the process chamber are digital. "We make instruments with higher processing power that offer not just a process parameter but information about the instrument's health, its calibration, MTBF, etc.," Blackborow said. These instruments can access digital networks, which have high-power computing systems. But everything goes down the RS232-based SECS port — a bottleneck. Manufacturers are moving to Ethernet, which is faster, but the protocol is still point-to-point. However, with dedicated connectivity products, tool outputs and inputs can be multiplexed providing that those applications on the network access the tool data, allowing several applications to poll it at a reasonable rate.

Dumping terabytes of data into a database is not a good data mining approach. Depending on the data stream, reduced data can tell something about the tool, its instruments or the wafer. "One of our instruments uses mass spectrometry to look for residual photoresist on wafers," Blackborow said. "It generates considerable data; however, we don't send it all. We reduce it to a single number, a 'photoresist index.' By developing an index, data handling can be reduced."

There is a tendency to take a cannon-for-a-mosquito approach to data. Huge data chunks are taken and pounded using statistical analysis. "We focus on intelligent algorithms that make data manageable," Blackborow said. "The statistical approach can miss the forest for the trees. Instead, analyzing variables for each process and reducing them to a manageable form using intelligent algorithms that act on the data and get information, instead of mining tons of data, is preferable." This is not trivial, because context is required to provide sensor information in a process tool. "To get its index, our sensor doesn't only acquire a mass spectrum for the chamber and calculate the photoresist that shouldn't be there. It also talks to the tool and the temperature sensor to check temperature level, queries the vacuum gauge, goes to the tool controller and gets the wafer ID and lot number. Because we don't make all the instruments it queries, we write flexible software and algorithms to communicate with other instruments and controllers, using our connectivity instruments, and create this intelligent output."

Atul Sharan, senior vice president of marketing and business development for Numerical Technologies (San Jose), sees the shift on the handling of yield management as a yield-increasing strategy. "Engineers aren't concerned about choices when designing a chip. They assume that the maskmaker and the manufacturer will handle yield. At 0.13 µm, with PSM and OPC at subwavelength, data complexity has increased. Usually, 'complexity' refers to something like more gates, ultimately a certain amount of data representing the design. When it undergoes optical proximity correction, you get about an order of magnitude of additional data, complicating the maskwriter's work, because OPC isn't applied with an eye to what can be written on the mask, but to what can be done in silicon."

There are solutions for controlling lithography as process windows narrow. "An option on our reticle inspection tool detects minute variations in energy transmitted through contact holes on the reticle during patterning," said KLA's Slessor. "These variations consume a significant portion of the total CD error budget, and can result in defects such as closed contacts and vias. An energy transmission reduction of as little as 6% can create a killer defect."

While other processes have established defect reduction programs, lithography operates in a reactionary mode and retains the highest portion of the fab's manual inspections. With new photoresist chemistries, thinner photoresists, smaller design rules and tighter process windows, the lithography cell houses the widest variety of defect types. Emphasis on both defect management and parametric control is necessary for an effective yield management strategy.

CD-SEMs do considerable lot dispositioning and process control, but are not the primary equipment used to analyze pass/fail yield issues. Poor parametric yield of individual devices and entire lots can be correlated to features that a CD-SEM measures. "A problem with CD metrology is that parametric yield is affected by 193 nm resist sensitivity to e-beam slimming," said Paul C. Knutrud, technical marketing manager at Schlumberger Verification Systems (Concord, Mass.).

In litho cells using 193 nm photoresist, line slimming that occurs during one CD metrology image or scan acquisition causes up to 5 nm of CD slimming under normal 300-500 eV CD-SEM landing energy conditions. The slimming level is site-dependent, and it is impossible to determine the original CD to a certainty of better than 5 nm. "As processes shrink, in-circuit measurements become the major CD metrology requirement," Knutrud said. "With in-circuit measurements, not only is certainty decreased by line slimming, but the feature's CD changes, compromising the uniformity being tested. Ultralow-voltage CD-SEMs (<200 eV) allow for the control of gate width and other CDs to within the required tolerances by reducing resist slimming to negligible levels."

"What's needed from a tooling perspective is identifying and pinpointing process excursion root causes," said Michael Darwin, director of technology development at Rudolph Technologies (Flanders, N.J.). "Excursions must be identified and contained immediately, so you need in-line monitors to warn you have an excursion from the baseline. Once identified, you must be able to use the collected information to get to the problem's origin. The monitoring scheme and data must be capable of being correlated across processes and platforms." The fab must be able to take the product and put it through an inspection tool, identify defects, bin them, describe them, and use historical defect-type references to track back to the specific tool.

Historically, there has not been much data sharing between the sort floor and the fab, said Max Guest, director of engineering for automated wafer inspection at Semiconductor Technologies and Instruments (STI, Plano, Texas). Whereas in the fab area there is a de facto data storage standard (basically KLA file review format and various data storage tools from KLA) in the wafer sort area, nothing like it exists. "Most storage methods are provided by the prober companies or are home-grown and don't talk to one another," Guest said. "This is a problem when integrating inspection processes to get an integrated QC group to track yield problems from the fab to the floor."

Guest said that data from an etch or possibly a metalization area may be stored in a yield management system. But if there is a yield problem at the test floor, there's nothing tracking it to the electrical test data. "There hasn't been an effort to integrate inspection and metrology data — these are almost different organizations operating within every company: fab yield QC and test floor sorting," he said. "One has a de facto standard not only for data storage, but in the fab they use SECS/GEM communication. On the test floor, most don't use it or a standard wafer map. Custom, home-grown wafer maps are used — some integrated with databases, others are flat files. When they swap information, they may change it into yet another format that the other group can read. Amazingly, these are multinationals. Right now, there is no standard for something as basic as keeping electrical data together with visual inspection data."

The industry faces multiple technology transitions (0.10 µm, copper and 300 mm), each with a plethora of yield hurdles, and needs yield management more than ever. Having tools that measure a process or find defects is no longer enough. To address yield management, a comprehensive strategy is needed that considers the entire fabrication process and turns in-line data into yield-improving results.

High yield is not cheap. It demands sophisticated instrumentation, whether sensors or integrated metrology. Cost reduction cannot come at accurate data's expense, because yield management cannot be done with inaccurate information.