Partners to Speed Yield Ramping Solutions

The software division of Electroglas Inc. (EGsoft, San Jose), is partnering with International SEMATECH (ISMT, Austin, Texas), Intel (Santa Clara, Calif.) and Texas A&M University (College Station, Texas) to develop a rapid diagnosis and yield ramp solution designed for logic devices.

The software solution aims to expedite the device manufacturer's ability to locate the physical origin of electrical faults in random logic ICs. Initial testing and certification at Intel showed a significant reduction in the time required to identify the physical cause of electrical failures. It works by correlating test, defect and schematic data, bringing a necessary solution for design-to-manufacturing. The project is funded by ISMT.

For additional information on yield management, go to www.semiconductor.net/yield.