Low-k Drives New Stripping Solutions

Photoresist stripping, long considered a straightforward, low-technology process, becomes much more sophisticated with the introduction of low-k dielectrics and copper. Because ashing with traditional oxygen-based plasmas will raise the dielectric constant of low-k dielectric films, forming gas (N₂/H₂) approaches with very low oxygen levels were developed to be compatible with low-k films. Performed in the back-end-of-line after trench etch and via etch, resist and residue removal steps must also be optimized to reduce or eliminate the potential for resist poisoning, a common integration problem. The absence of a single low-k dielectric winner — though the industry is strongly leaning toward CVD organosilicate glass (OSG) films and SiLK organic from Dow Chemical (Midland, Mich.) — has also led to a vast array of residues, requiring a multitude of dry and wet removal solutions. In addition, following the barrier open step (Fig. 1), care must be taken to fully remove sidewall sputtered copper and copper oxide, while leaving an acceptable profile for barrier deposition. This is the latest requirement of ashing tools.

Wet residue removers, as is the case with aluminum interconnects, complement dry processes. Though IC manufacturers would much prefer all-dry or all-wet solutions, the technical requirements are demanding that both coexist. "We have definitely detected a sea change in attitude over the past two years, with people originally working toward an all-dry approach to resist strip and clean, with the sensitivity of low-k materials in mind," said Keith Buchanan of Trikon Technologies (Newport, UK). "But now there seems to be the realization that, as you shrink down the feature size, you still need a subsequent wet clean to completely remove non-volatile residues." Ashing tools do an excellent job of removing organic components of post-etch residues, but they are challenged to remove inorganic residues and metallic contamination, which is the specialty of wet remover chemistries.

1. Copper is back-sputtered on the sidewall during the nitride barrier open step. HF could clean the copper but causes CD loss. Instead, EKC 525 Cu removed the residue after 10 min at 50°C in a spray processor. (Source: EKC Technology)

"A high-yielding process requires both plasma strip and wet clean. It's important that the strip not deplete surface carbon to avoid wet clean damage to the low-k material," said Ivan Berry, director of advanced technologies, curing and cleaning systems at Axcelis Technologies (Beverly, Mass.). "There are efforts within the industry to optimize the interaction between ash and wet clean sequencing and processes," added Elizabeth Pavel, technical marketing manager in the Etch Products Business Group at Applied Materials (Santa Clara, Calif.). "For example, residue-softening plasma treatments are designed to enhance residue removal, reduce defect density and provide smoother interfaces after wet cleans."

Removers are offered by many companies, including Arch Chemicals (Norwalk, Conn.), Ashland-ACT (Dublin, Ohio), ATMI (Danbury, Conn.), EKC Technology (Danville, Calif.), J.T. Baker (Phillipsburg, N.J.), Kanto (Portland, Ore.), Mitsubishi Chemical (Sunnyvale, Calif.), and Shipley (Marlborough, Mass.). Alternatives to specialty chemicals are also showing compatibility with low-k and copper, such as dilute HF. Dilute acid-based removers are competing with solvent/water systems and some amine-based chemistries for residue removal. Figure 2 illustrates the removal of residues from SiOC sidewalls and SiC etch stop using a dilute acid chemistry.

2. Polymer on the sidewalls of an SiOC film on an SiC etch stop is removed using a dilute acid chemistry for 30 sec at room temperature on a single-wafer cleaning system. (Source: Shipley)

For next-generation (65 or 45 nm) porous low-k dielectrics, a variety of films are available including JSR's LKD 5109, Shipley's Zirkon 2200 film, and porous SiLK. The jury is still out on whether only all-dry processing will be compatible with porous films. Ashing with both oxidizing and reducing chemistries have shown promise to date (Fig. 3). According to Eric Alling, director of marketing communications for Shipley's Microelectronics Division, porous low-k materials are most compatible with dilute acids.

3. Porous low-k material after photoresist strip. Low-oxidizing and reducing chemistries yield similar results. (Source: Ulvac Technologies)

Selectivity is the fundamental performance issue for residue removal. "Once you go to low-k dielectrics, you have lower selectivity than you used to have with silicon oxide, so optimized process chemistry and uniformity become paramount to successful operation," said Philip Clark, product manager of Enviro tools at Ulvac Technologies (Methuen, Mass.). He highlighted the importance of having access to a variety of chemistries because customers are using different types of low-k materials and integration schemes.

George Mirth of Shipley emphasized the importance of being able to identify all components in the residue. "Our experience in lithography and our integration work comes into play — knowing the material makeup of the residue and the dissolution rates of the cross-linked resist, nitrides and oxides, antireflective coatings, hard masks, etc. Then we can select the best category of chemicals and iterate through formulation optimization to give the greatest selectivity between the material to remove and the stack, with minimum effect on the copper and low-k."

Low-k dielectric choice and integration scheme also affect the residue removal approach. "Although some exceptions exist, CVD materials can tolerate more potent formulations containing amine/water or acid/base relative to spin-on materials," said Shipley's Ed Rutter. At the same time, SiLK was one of the first low-k materials on the market, so more extensive integration work has been performed on this material than most others.

In an oxygen plasma, reactive oxygen radicals react with methyl and other carbon groups in the low-k film, effectively depleting the carbon content and raising k value. Profile loss (critical dimension loss and rounding) also occurs. Profile integrity can be improved by using a directional reactive ion etch (RIE) at low pressure (~40 mTorr), using only N₂/H₂ and little (2-3%) or no oxygen gas. However, attaining acceptable etch rates (5000 Å/min) proved extremely difficult with these tools. Depending on the integration scheme and the susceptibility to photoresist poisoning, many IC manufacturers would also prefer to eliminate nitrogen and ammonia from the stripping process, along with oxygen.

"Photoresist stripping is no longer a low-tech application," said Graham Hills, vice president and general manager of the Surface Integrity Group at Novellus Systems (San Jose). "Because this is the first time we've ever had a material that could be adversely affected by the simple act of stripping resist off of the substrate." The effect of device performance is much more significant now, added Scott Becker, vice president of product management, Surface Condition Division, at FSI International (Chaska, Minn.). "In the past, we worried mainly about selectivity and maintaining critical dimensions; now we have to worry about chemical diffusion and infiltration into the low-k material, which can change k value immediately or in a subsequent process."

As luck would have it, the typical location of low-k damage is on the sidewalls of trench and via features — the precise location where low-k properties are most important. "We focus on sidewall damage because that controls the k value, and the top surface is less of a concern because there's typically an oxide on top of the low-k film to facilitate CMP," Hills explained. Allowable k shift depends on the device maker's specifications — it can be as low as 2% or as high as 10%, according to Tom Kloffenstein, global product manager for photo etch solutions at ATMI.

"It is also critical that the removal processes provide a defect-free, smooth surface for the subsequent copper barrier seed deposition, especially for the finer geometries," Pavel said.

For copper/low-k dielectric compatibility, ashing systems were redesigned to add more physical forms of residue removal, using RIE or low-pressure sources such as inductively coupled plasmas as well as rf wafer bias to remove stubborn post-etch residues. The change in system architecture opened up the ability to use new process chemistries, while at the same time delivering better success with standard chemistries, explained Bob Guerra, senior member of the technical staff for Mattson Technology (Fremont, Calif.). "The right system architecture improved the results using oxygen, while newer helium, argon, and fluorine and hydrogen gas mixtures could be accommodated by the plasma system as well."

Such systems also allow more integration options for customers. "By introducing a more physical, anisotropic component to the resist removal process, we can introduce a barrier etch step exposing the underlying copper, which we have performed on porous low-k films in our Highlands system at IMEC," Guerra said. "Because there is a question of whether you can use both fluorine and reducing chemistries, users may choose to dedicate a separate chamber for the barrier open step, while maintaining throughput advantages by not breaking vacuum," Clark said.

Axcelis' FusionES3i BEOL tool achieves high throughput without sidewall carbon depletion by the use of highly selective chemistries in an optimized process chamber.

Ulvac Technologies utilizes an ICP source at low process pressure combined with an electrostatic chuck to generate low wafer temperature (5-85°C).

Novellus' Sierra system also uses RIE and a downstream microwave plasma source. It has multiple process chambers (up to three), each with its own loadlock, so that wafers can be transferred while others are being processed.

There is some debate as to whether ammonia and/or nitrogen can be used for residue removal due to photoresist poisoning. Poisoning occurs when amine-based species come into contact with the chemically amplified resist and effectively neutralize the acid compounds generated during exposure and development. This leads to feature footing or crowning. It is thought that nitrogen radicals in plasmas can be a player in resist poisoning. The susceptibility also depends on the resist itself. Mature KrF (248 nm) resists are less likely to suffer from poisoning than the newer ArF (193 nm) resists. "Whilst you can probably use a nitrogen-containing mixture for 248 nm lithography, once you go to 193 nm you probably want to remove the nitrogen as well because of the via poisoning issues," said Buchanan.

The use of nitrogen in the etch or strip process can be a contributor to surface carbon depletion and subsequent damage by the wet clean, noted Berry. For this reason, a He/H₂ plasma provides better results (Fig. 4).

4. A low-k structure before plasma strip (left), after N2/H2 plasma and dilute HF (center) and after He/H2 and dilute HF (right). (Source: Axcelis)

With less aggressive ashing chemistry, it becomes harder than ever to attain production-worthy removal rates of ~5000 Å/min. "Low cost of ownership and reliability are especially important to the customer at this time," Novellus' Hills said.

Over the past decade or so, remover chemistry has evolved from strong organic solvents, often containing hydroxylamine (HDA), to less hazardous semi-aqueous chemistries (typically NH₄F or dilute acid-based) to even more dilute acids, solvents and basic chemistries. One goal is to identify alternative chemistries with the cleaning performance and wide process latitude that HDA solutions are known for. "Today's approaches are a huge departure from strong organic solvents, and the changes have had a significant impact on cycle time, cost, and environmental and safety benefits," said FSI's Becker. He estimated the chemical cost per wafer of an HDA process with IPA rinse is ~60 cents/wafer, and that it takes 40 min to process, whereas a dilute HF chemistry costs <5 cents/wafer and runs 15 min. Kloffenstein said that the price per gallon of the latest, fluoride-based removers is similar to previous solutions but the move to low-temperature operation (23-40°C) greatly extended bath life, especially with respect to HDA processes that operated at 65-70°C.

"You have loading factors, how much residue can be in solution before it affects the process, something called drag-out, referring to the loss of remover caused by wafers being taken out, or changes in composition and pH of the bath, and the frequency of replenishment cycles," said Darryl Peters, R&D principal scientist at Ashland-ACT.

"The choice of chemical solution is closely related to the overall process integration for low-k and copper," said Dana Scranton, vice president of surface preparation technology at Semitool (Kalispell, Mont.). "There has never been such a wide variation in materials and a broad range of chemical formulations. Consequently, the selection of process chemical to address the cleaning challenge takes more time, and in some cases is more platform-dependent than in the past."

There are various methods of testing the efficacy of cleaning steps, including SEM imaging. However, electrical tests like via resistances and via chain yields are best. "Whereas electrical testing was always a good way of determining cleaning efficacy, now it's the only way to get the proof," said Eric Finson, EKC Technology's business director of remover products. Many companies use chemical ion mass spectroscopy or thermal desorption spectroscopy to detect residual materials that will have an adverse effect on subsequent processing. FTIR is widely used to detect moisture absorption. "But you have to be careful because you can get a good FTIR reading on a film that has been damaged, and even though there is no water present, the k value still can have changed," said Jim Mello, vice president of technical operations at SEZ (Phoenix).

In some cases it is possible to go to all-wet solutions (removing resist and residues), but there are practical issues that may prevent such an approach. "If you have a wet photoresist strip with exposed copper, you have to ensure there's no redeposition onto the copper, and the solution must be organically aggressive enough to remove plasma-hardened resist," said Dave Maloney, research applications engineer at EKC Technology. Maloney added that many companies prefer not to use corrosion inhibitors. "Any good corrosion inhibitor invokes the formation of a passivation layer, which is a copper oxide layer, so it has to be removed in a subsequent step." Instead, companies develop remover chemistries that are formulated in a specific pH range with no strong oxidants or charged species that would chelate the copper, keeping corrosion at bay.

Some removal processes require two steps. "Typically in these more complex dual-damascene stacks, one chemical approach will not work. So separate tanks are configured to use an amine or basic solutions to swell and peel off cross-linked resist, followed with dilute acid to dissolve and remove the ARC and remaining residue," Shipley's Mirth explained.

"Chemicals used during wet clean need to be non-selective to multiple dielectric films in the stack and ensure complete residue removal without profile degradation or defect decoration," said Satheesh Kuppurao, technical marketing manager for Applied Materials' Wet Clean Division.

Another challenge arises from the variety of ARC materials being used, both spin-on versions from Brewer Science (Rolla, Mo.), Shipley and other firms, and inorganic CVD. "With shorter-wavelength lithography, we're seeing quite a bit of growth in the use of BARCs, and in some cases we're being asked to remove an organic silicon-containing polymer from a silicon-containing low-k film with organic content, and getting that selectivity is a challenge," Maloney said. "The ARC market is almost as varied as the low-k dielectrics market. We've seen ARCs we can handle with ease and others that are a big problem."

The debate continues over whether single-wafer or batch processing will prove best for 300 mm fabs. Cleaning tool suppliers include Applied Materials, Dainippon Screen Manufacturing Co. (Tokyo), FSI International, SCP Global Technologies (Boise, Idaho), Semitool, SEZ, Tokyo Electron Ltd. (TEL, Austin, Texas) and Verteq (Santa Ana, Calif).

Single-wafer formulations have to be strong enough to enable 60 or 90 sec processing times (excluding drying), in order to compete with batch approaches. "In single-wafer processing, the pressure is not as strongly related to performance as it is productivity gains and cycle times," Becker said. He added that many single-wafer systems can deliver a limited number of chemicals, operate in a narrow temperature range, and cannot clean both sides of the wafer simultaneously.

Applied's Kuppurao refuted this claim, stating that "single-wafer processing is ideally suited for quick chemical changes and reduced wafer exposure time to chemicals, while ensuring no cross-contamination between wafers." Semitool's Scranton added that single-wafer cleaning in an enclosed microenvironment allows side-selectable cleaning in a single tool and single chamber, with the same or different media, thereby minimizing footprint and cycle time.

Single-wafer processing can also allow off-the-shelf chemistries such as HF and H₂SO₄/H₂O₂ solutions to be used. "When you go to single wafer with inorganic chemistries, the process window grows," SEZ's Mello said.

Typically, inadequate residue removal shows up in subsequent processes such as CMP, or in reliability degradation, said Paul Mertens, group leader of Ultraclean Processing at IMEC (Leuven, Belgium). He emphasizes too that, as the dimensions are scaled down further, detection, characterization and cleaning without creating damage becomes dramatically more difficult. For instance, at the 90 nm node, 45 nm defects are the concern.

An important issue in single-wafer vs. batch immersion or spray processing is environment, safety, health and disposal requirements. Though the general trend from organic solvents to today's dilute chemistries has had enormous environmental benefits, new cleaning chemistries don't always go hand-in-hand with safety. "Environmentally friendly products usually degrade rapidly so they are not very stable, meaning that they can trigger vigorous reactions, possibly introducing safety concerns," Mertens said.

Though the industry is early in the evaluation of porous low-k dielectrics, hurdles are already being faced. "Drying of hydrophobic surfaces, especially the mixed hydrophobic and hydrophilic surfaces that we have with many low-k films, is quite tricky," Mertens said.

With open-pore dielectrics, a dielectric barrier may be required between the low-k film and barrier metal. "You start off with a porous material, but once you've etched and stripped it, the sidewalls can be sealed so that they are no longer porous, which offers you some protection against subsequent wet processing," Buchanan said. Similarly, International SEMATECH (Austin, Texas) has found that a conformal CVD capping layer can be deposited over porous structures, or the ashing process can be modified to help seal the sidewalls (Fig. 5).

5. Porous low-k structures can be sealed either by modifying the ash step (left) or depositing an ultrathin nitride liner (right). (Source: International SEMATECH)