Defect Management Deals with New Materials, Tools
Alexander E. Braun, Senior Editor -- Semiconductor International, 8/1/2002
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Void detection in the copper damascene structure is difficult to detect during processing. Ultrathin film layers integrity is a concern today," said Alec Reader, line of business manager, semiconductor, for Philips Analytical (Almelo, Netherlands). "We've been working on barrier layer measurement. Barrier layers are getting thinner and becoming susceptible to pinholes."
Paul Marella, vice president of product marketing for the wafer inspection division of KLA-Tencor (San Jose), considers shrinking design rules and new materials as sources of increasingly smaller and varied defects that must be detected and quickly understood. "The challenge is finding these new defects while improving the capability to discard those of no interest. With 300 mm, our customers want cycle-time models similar to the ones they used for 200 mm. This requires that inspectors maintain increasing sensitivity, be faster, and execute as much defect-review capability as possible. The balancing act is about simultaneously increasing inspection, providing more value-added review capability, and increasing throughput."
Ulrich Winkler, chief marketing officer for the process diagnostic group at Applied Materials (Santa Clara, Calif.), sees hurdles approaching. "Cycle time is becoming a major defect management concern. Accelerated time-to-market windows require that we help chipmakers identify and correct process issues much faster."
Moving with Moore's Law"Moore's Law has resulted in greater emphasis in controlling defectivity in the litho cell," said Bobby Bell, vice president of marketing for KLA's wafer inspection group. "As engineers push k factors in lithography to make photons work harder using complex OPC, phase-shift masking, and other reticle enhancement techniques, this results in new lithography defects that, in turn, drive new methodologies to ensure that the overall system functions within a shrinking process window. Thus, we're seeing increased adoption of high-resolution wafer inspection tools in lithography (Fig. 1). We're also seeing the increased adoption of high-end optical and e-beam inspection systems in BEOL with the mounting complexity and number of metalization layers, and new copper and low-k-related defects."
"Take our family of optical patterned wafer inspectors," Marella said. "We have high-resolution imaging tools and laser scattering platforms. The high-resolution imaging tool is more sensitive, but slower than the laser scattering inspector. Most of our customers use both on critical layers. If they used only the higher-sensitivity platform, it'd be too expensive. So they've adopted a strategy in which the higher-sensitivity tool is used at a certain sampling rate, supplemented by the lower-sensitivity laser-scanning tool, which doesn't find everything that the high-resolution imaging tool does, but allows more frequent overall sampling for a better cost/benefit trade-off."
Particles and lithographyAccording to Pete Gise, marketing manager for Nanometrics (Milpitas, Calif.), 300 mm fabs are looking to automate, particularly macro inspection. "An issue is automatic inspection of the wafer's front and backside," he said. It must be done to the edge — a requirement of current inspection tools — requiring both the robot and stage to use an edge-gripping system. "You cannot have an edge-gripping robot and flop the wafer down on a chuck that contacts its back — it transfers particles," Gise said. "This is serious — anything on the wafer's backside can cause a position change that alters DOF (depth of focus), because new steppers' DOF is practically zero."
Atul Sharan, senior vice president of marketing and business development for Numerical Technologies (San Jose), sees changes on the lithography side. "At 0.13, 0.10 µm and below, you must manage feature printability because of OPC and phase shifting — consider the system from design to silicon. If I look at something as simple as reticle inspection with OPC and other techniques — none of which are supposed to print in silicon — I don't know if what I see is a real defect or not."
Today, one does as much reticle inspection as possible. This procedure is falling apart due to the minimum essential factor: One only inspects what is critical. On silicon, this is tied to what is design-critical. Since reticle inspection systems lack design information, they may spend as much time inspecting a logo as a gate. "With these complexities and the inspection needed, it's impossible to continue like this," Sharan said. "Classically, the inspection trade-off is between throughput and quality. Viewed as a curve, as you get to subwavelength, the shift demonstrates that, unless inspection strategies change, you'll get less quality for the same throughput. One must inspect only what's important, with better sensitivity and tolerances."
Finding subsurface defectivityFEI Co. (Hillsboro, Ore.) is getting increasing traction in subsurface defectivity early warning. "Manufacturers need early defect warning to predict and maintain yield," said Anantha Sethuraman, vice president of marketing for the microelectronics product group. Conventional SEM cross-section is not ideal when using copper low-k integration schemes, because when it does the low-k cross-section it smears it, degrading feature resolution. "Dual-beam technology doesn't alter the morphology, providing adequate structure resolution," Sethuraman said. "It'll become a mainstream in-line inspection method. This'll happen in follow-on analysis where, for example, an e-beam or optical inspection is performed, discovering certain defects of interest. The user navigates to that particular site, does the cutting and looks at the actual defectivity. Another is the enabling side, where we can help control these defectivities before they hit the line — monitoring rather than controlling."
Voids and poresMuch has been said about the big push in transitioning to copper interconnect, said Pete Nunan, vice president of yield technology services at KLA-Tencor. "A big issue is via voiding, which is easy to detect (Fig. 2). The problem is it causes reliability failures, and we must determine the root cause. It's especially important to detect microvoids, voids that aren't either a full open or resistive vias that eventually open under stress or in the field, causing reliability problems."
| 2. The use of dual-beam cross-sectioning is becoming an important necessity for process control and analysis of voids in copper interconnect structures. (Source: FEI) |
Important reticle defects were once obvious — an environmental particle, a scratch, or a bad repair. Now a reticle CD variation manifests itself as a physical defect — such as a void — on the wafer. "We mustn't only find missing vias or contacts; it's also important to detect undersized vias and contacts on the reticle as far upstream as possible," Nunan said. These defect types narrow process windows, making it necessary to determine how much of an undersize is tolerable, and how much focus/exposure dose to run. "The solution is inspecting and characterizing the reticle with an inspection tool before printing the wafer, and discerning as little as a 5% CD variation," he added.
Philips' Reader views both X-ray diffraction and X-ray fluorescence-based techniques, besides ellipsometry, as optimal for thin layer measurement. "The ITRS roadmap predicts a few atomic-layer-thick barrier layers, and X-ray techniques measure this well, particularly when you have a high atomic number element involved, such as zirconium, where fluorescence is high and detection relatively simple." This also links into high-k materials because they tend to be zirconia or hafnium-based, enabling accurate thickness measurements.
Another concern is pore size in ultralow-k materials. "By using X-ray diffraction techniques, it's possible to determine pore size, important when low-k material is etched to form vias," Reader said. "Large pore size can mean yield problems and via poisoning, because voids contain deleterious organic materials. We must measure down to the bottom of high-aspect-ratio vias, where you have very thin barrier layers, and poor step coverage occurs right at the bottom."
Inspex (Billerica, Mass.) is concentrating on detection of defects primarily affecting the 90 nm node, according to Kurt Greissinger, product manager. "We're at about 40 wph, and plan to maintain that throughput level as we increase sensitivity."
Inspex focuses on high-speed defect reduction, and recognizes that there is a trade-off between capture rate and inspection time for any given defect, since speed is useless if defects of interest remain undiscovered. For a tool capable of sufficient detection across a broad range of defect types, however, such a trade-off can be an asset in a fab's overall statistical process control strategy. Detection need only be sufficient. What matters is not the tool's capability to find all the defects, but how fast it can detect the onset of a process excursion: the minimum time necessary to detect a targeted number of each defect type. Providing data beyond this statistically significant number gives little value and comes at a price if inspection speed is low. It is better to have a tool running at a relatively low capture rate that attains that threshold number of defects faster than its higher-capture-rate counterpart. With a tool having a wide defect range capability, it is practical to consider the trade-off of reducing capture rate to maximize response speed to a potential excursion.
Apart from those associated with high-speed detection, the problem is securing the capability to capture the widest possible spectrum of killer defects in a single scan. Smaller CDs and new materials add to the challenge. The high-speed inspection of defects or residual material on high-aspect-ratio structures is an example. These are weak, difficult-to-detect signals, particularly at high throughput levels. "It's a physics problem — increasing signal over noise," Greissinger said. "We've focused on maximizing the signal-to-noise ratio, prior to the detection of the signal by the camera. We use high-resolution diffraction-limited imaging optics and variable illumination optics to shift the features' diffraction pattern out of the imaging optics' collection field. We also use coherent signal processing to filter out residual feature diffraction, and allow diffraction from the actual defects to pass to the camera. Only then we rely on software processing techniques such as die-to-die comparison, to address residual effects."
Shrinking cycle times"Defects must be detected sooner with better capture rates, in a manner that provides early clues about their origin, enabling rapid corrective actions," said Applied's Winkler. As CDs shrink, defects are a larger issue. "Fabs struggle with the daily terabyte of information being created — if you run a SEM at nominal performance and throughput, you easily get tens of gigabytes of data daily," he said, adding that it is important to mine this data to determine if there are processing problems and, if so, where. "This cannot be done remotely after the fact — the more real-time processing of data done at point of use, the better. Moving it to a data warehouse and then studying it to carry out some retrospective action is ineffective for quick responses to whatever is out of spec."
Viewing a problem from different angles is important, whether for unpatterned or patterned wafer defect detection, optical or e-beam. "Multi-perspective imaging is key, whether we do optical inspection, defect review, or e-beam inspection," Winkler said. "Even with CD-SEMs we use multi-perspective imaging. This quickly indicates what needs correction."
Applied uses synergies between inspection, review, and metrology tools in their internal pilot fab-like structures. "When we roll out a new technology — say, low-k deposition — we supply a complete suite of inspection and review libraries, with corrective action solutions," he added. This helps the user largely skip the initial optimization phase and quickly figure out the best methodology to detect issues often present with new materials and technologies.
Defectivity and cleaningDana Scranton, vice president, surface preparation technology at Semitool (Kalispell, Mont.), believes current metrology allows particulate contamination detection down to 0.12 µm — 0.09 µm with questionable accuracy. Modern defect detection systems demonstrate greater sensitivity to surface conditions such that more information, such as oxide thickness and film properties, is needed. "You don't know the challenge's magnitude until you measure it," he said. The industry is speeding the introduction of <0.10 µm technology, focusing on defect reduction. The capability to measure contaminants drives development of methods and platforms for reduction in defect-causing contamination.
A major problem with defect detection and reduction is that rapid design rule evolution allows less time for process and platform solutions. "Key here is the rapid development of processes, process chambers, and host platforms that accommodate the constant materials and design changes," Scranton said. "We're asked to deliver <20 particles on a 300 mm wafer at 0.09 µm for full process — the only reason it's not <0.09 µm is metrology's limits. With 0.09 µm design rules we should be looking at 0.045 µm particle sizes."
Smaller sizes change particles' nature: Is it a particle, an aerosol, or a surface anomaly? Particle control physics becomes more complicated, as does the hunt for sources and transport mechanisms. As particles shrink they change, requiring process development and delivery advances. While basic mechanisms for particle removal remain, their contributions alter. For example, hydrodynamic drag is less for a 0.09 µm particle than on a 0.16 µm one. Surface electrical attraction is greater for the smaller particle than the larger one.
Low-k materials are cleaning challenges. Due to the indecision over which to use, solutions are transient. "Most are good, none are universal," Scranton said. "Some chemical solutions for cleaning of low-k materials create cleaning problems in and of themselves." Alternatives to conventional liquid chemicals, such as supercritical fluids, may be necessary. Advances in wet chemical processing, including surface preparation and electrochemical deposition, will be critical to support device technology advances. Drying necessarily follows as a challenge associated with wet chemical processing. Again, supercritical fluids are being considered, but other technologies are available for wet chemical processing. Beyond the 90 nm node, Scranton believes there will be a significant drying challenge. "While some look to supercritical fluids, there are simpler, more cost-effective technologies."
Bump and packagingAccording to Dan Nelson, director of corporate development, strategic marketing at August Technology (Bloomington, Minn.), the company sees growing applications for bump inspection, in addition to incoming and outgoing inspections in the advanced packaging area. "Process control is more crucial. Advanced packaging or bumping is similar to a FEOL process because it goes through a photolithography step, a metal deposition step, and an etch step — the same sequence of events as in the FEOL. Fabs are incorporating some FEOL process control and evaluating stand-alone tools for BEOL metrology and inspection, for process control in these bumping processes."
Some equipment suppliers — photolithography, track, steppers, CMP, dielectric deposition, etc. — now have tools both in the FEOL and advanced packaging lines. They see the benefit of integrated process control in FEOL tools, and are considering incorporating integrated modules just like at the FEOL, into BEOL tools.
Post-fab InspectionAccording to Jeff Hintzke, vice president and general manager of the electronic inspection division of Electroglas (San Jose), most of his company's inspection and defect detection is not submicron. "We have a couple of hot areas. One is the inspections in the sort floor, the second is optical, fab exiting — both still done on manual and some automated microscopes. These capabilities in an automated machine are more reliable and consistent than a human operator's. We're doing automated defect classification and using software techniques to help the user determine that he has a defect, tell him at what level it is or that it is metal bridging, a particle or a scratch."
Another important measurement area for flip chip is 3-D measurement. A critical aspect is bump coplanarity. If it is too big or small, packaging problems result. True bump height measurements are needed. However, current technologies are relatively slow. "We've been working on 'smart sampling,' where you do a full 2-D high-speed inspection, and use the results to direct the 3-D inspector to carry out a sampling plan," Hintzke said. "So instead of blindly inspecting 100% of your die, you get 90% of what you need with 2-D inspection, then do 3-D inspections on 20% of your die."
Intelligent inspection is necessary. Engineering expertise and knowledge must be institutionalized into tools that allow inspection at every stage, with the capability to browse a point on the mask or design layout and do silicon simulation to determine the change's impact in silicon. The loop between getting evidence that something is wrong to correcting the problem must be shortened, providing actionable information for fast corrective action.
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| Applied Materials | August Technology | Electroglas |
| FEI | Inspex | KLA-Tencor |
| Nanometrics | Numerical Technologies | Philips Analytical |
| Semitool | ||