Stress-Induced Voiding: A Significant Failure Mode

Stress-induced voiding (SIV) has been observed for copper DD structures. Manifested as voids underneath small vias connected to wide copper lines, researchers from Texas Instruments (Dallas) performed tests to explore the failure mechanism of SIV. E.T. Ogawa and co-workers, who presented their findings at the recent IEEE International Reliability Physics Symposium (IRPS), determined that SIV is an important failure mechanism in copper structures, and the occurrence of such voids is strongly process- and structure-dependent.

SIV is typically characterized using metal test structures that are sensitive to SIV-induced resistance rises, storing devices in an unbiased condition at elevated temperatures (typically 150-200°C) and measuring resistance changes. The lack of a bias ensures SIV failures cannot be confused with those caused by EM. Based on 0.18 µm technology, the group at TI fabricated DD, ECD Cu interconnects on a PVD Cu seed and Ta barrier on a single-damascene M1. The ILD is FSG and the copper cap is PECVD nitride. Without annealing the M2 ECD copper, the group continued processing through the seventh metal level. The DD-processed Van der Pauw via test structures with 3-µm-wide metal leads ensured that voiding under the via could be easily detected by resistance changes.

The samples were baked for 500 hr at 100-250°C, and resistances were measured at 168, 336 and 500 hr at 50°C increments. A comparison of the voiding rate at different temperature but same test times showed a maximum in voiding rate between 150-200°C. Consistent with stress migration were the peaking of voiding rate at a certain temperature (T_crit) after which the voiding rate drops off to a stress-free temperature, determined to be 190°C in this study. Physical analysis demonstrated that vias with partial voiding formed isotropically and preferentially at the perimeter of the via bottom, not directly below the via center. Using a stress migration model by McPherson and Dunn, the data confirmed a T_crit of ~190°C. The observed diffusional activation energy of 0.74 eV was lower than expected (~1 eV), which the authors attributed to both interfacial diffusion as well as grain boundary self-diffusion.

The TI researchers determined that voiding under vias requires an active diffusion volume — a region where the interconnect geometry, diffusion mechanism volume and stress gradient region coexist. This volume is significant and constitutes a serious reliability concern for wide copper lines connected to small vias. In the case of copper that is encapsulated without annealing to facilitate grain growth, there is a sufficient supply of vacancies trapped in the grain boundaries, which can coalesce and enable mass transport at the critical interfaces between Cu/SiN and Cu/barrier. Therefore, sufficient annealing is essential prior to copper encapsulation.