Early Failures are Key in Copper Electromigration
Laura Peters -- Semiconductor International, 7/1/2002
Electromigration (EM) chip failures are caused either by catastrophic electrical opens or by resistance shifts that are significant enough to cause functional failure. While copper's potential for EM is substantially lower than that of aluminum, the use of copper vias in dual-damascene (DD) structures and the presence of thin barrier metals and high-aspect-ratio features tend to complicate the EM picture. In particular, the change from tungsten to copper vias means that vias and lines are susceptible to EM.
In recent years, many studies have shown bimodal failure mechanisms for copper interconnects. At the recent IEEE International Reliability Physics Symposium (IRPS), Jason Gill and co-workers from IBM Microelectronics (Essex Junction, Vt.) and Infineon Technologies (Munich, Germany) studied reliability failures in a large number of devices to better understand the role that early failures play in copper DD systems.
The group's large-scale (>250 samples) EM study used
test structures with a 0.28-µm-wide, 200-µm-long DD Cu M2 line connected to a
wide M1 line by a DD via. Electrons flowed through M1, V1 and into M2, and were
tested at
300°C and 25 mA/µm2. Failure corresponded with a 20% shift in resistance. Physical analysis showed that all early failures were the result of voids in via bottoms, alone or in concert with voids in M2, which were often at the M2/cap interface. Late failure parts showed voiding at both the M2/nitride cap and the via bottom/M1 interfaces. The early failures showed no correlation with wafer, lot, chip location or initial resistance of the test structures, indicating that process-induced variability was not the primary cause of failure.
Importantly, the study examined whether a 250 sample size (on six wafers), with an early failure population of 35 parts, provides a sufficient confidence interval to use in predicting reliability. Statistical simulations proved that bimodal failures require much greater sample sizes than devices with single failure modes, requiring five to six fitting parameters relative to two. The group concluded that bimodal failure distributions are a reality for DD copper. Since expanding the sample size by perhaps 10× is not practical or cost-effective in manufacturing, they recommend the study of alternative test methodologies to provide better confidence intervals for early failures, which would be the dominant failure mode at the product level.
