Prototype Reference Materials Solve CD Measurement Uncertainties

In the most recent edition of the International Technology Roadmap for Semiconductors (ITRS), the decrease of gate linewidths used in state-of-the-art IC manufacturing is projected from present levels of up to 250 nm to below 70 nm within several years. Since preparations for meeting the needs of future technology nodes must begin well in advance, some in the industry are concerned. This is because the workhorses of CD measurement — such as the scanning electron microscopes (SEMs) and other systems that have been traditionally used for linewidth metrology — exhibit measurement uncertainties that, in some cases, considerably exceed ITRS-specified tolerances for these applications.

It is widely believed that many of these uncertainties can be partly managed through the use of CD reference materials produced with linewidth values that are traceable with single-nanometer-level uncertainties. Until now, however, such reference materials have been unobtainable because the technology needed for their fabrication, as well as a reliable means of assuring their traceability, have not been available.

According to Stephen Knight, director of the Office of Microelectronics Programs at the National Institute of Standards and Technology (NIST, Gaithersburg, Md.), a technical strategy has been developed by the organization for the fabrication of necessary CD reference materials with appropriate properties. It is based on the Single-Crystal CD Reference Materials (SCCDRM) implementation. Knight explained that essential elements of the implementation are that the starting silicon wafers have a (110) orientation; the reference features are aligned to specific lattice vectors; and their lithographic patterning have lattice-plane selective etches of the kind used in silicon micromachining. This approach enables straight reference features to be provided, which have vertical, atomically planar sidewalls. The Figureillustrates a low-magnification transmission electron micrograph (TEM) of the cross section of a 100 nm reference feature, showing its rectangularity.

	Low-magnification TEM of the cross section of a feature, having a measured ECD of 73 nm. (Source: NIST)

To enable electrical linewidth metrology, the reference features are patterned in the device layers of silicon-on-insulator (SOI) material. Next, the absolute linewidths of a subset of these features are determined from lattice-plane counts extracted from HRTEM images. The absolute linewidths are then reconciled with the features' previously measured electrical linewidths. "In this way, the linewidths of all reference features on the wafer that are not used for HRTEM imaging become calibrated with specified uncertainties and having traceability to silicon's (111) lattice-plane spacing," Knight said. Typical reference features with nominal linewidths of 100 nm are several hundred lattice planes wide. HRTEM lattice-plane image counts, achieved by automated analysis of phase-contrast images, were developed to minimize the uncertainties of the linewidths of the standards.

The end product of the fabrication and calibration process described is a quantity of reference features, each accommodated on a test chip that is diced from the starting wafer. The SCCDRM implementation is responsive to the semiconductor industry's current requirement that reference materials be produced with the physical properties of standard 200 mm wafers. This technical strategy includes embedding each individual test chip in a micromachined pocket in a standard 200 mm wafer.

The final result is an assembly of acceptable cost that is compatible with the wafer-handling capabilities of modern CD-SEM metrology systems, simplifying its use. According to NIST, the entire fabrication and certification process is being transferred to an established vendor of physical standards to the semiconductor industry. At the time of this writing, a selection of the reference materials had been supplied to International SEMATECH (ISMT, Austin, Texas), which has partnered with NIST and provided incentives and funding to the project. ISMT's member companies are evaluating the distributed reference materials with state-of-the-art AFM and CD-SEM metrology systems. It is expected that the results of these measurements will enable further improvements to the next generation of reference materials.

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